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AD7118LN ,LOGDAC CMOS Logarithmic D/A Convertercharacteristics are included for design guidance only and are not subject to test.T = +258CT = T , ..
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AD7118BQ-AD7118CQ-AD7118KN-AD7118LN
LOGDAC CMOS Logarithmic D/A Converter
REV.ALOGDAC
CMOS Logarithmic D/A Converter
GENERAL DESCRIPTION
The LOGDAC® AD7118 is a CMOS multiplying D/A con-
verter which attenuates an analog input signal over the range
0 to –85.5 dB in 1.5 dB steps. The analog output is determined
by a six-bit attenuation code applied to the digital inputs.
Operating frequency range of the device is from dc to several
hundred kHz.
The device is manufactured using an advanced monolithic
silicon gate thin-film on CMOS process and is packaged in a
14-pin dual-in-line package.
ORDERING INFORMATION
NOTESN = Plastic DIP; Q = Cerdip.To order MIL-STD-883, Class B processed parts, add /883B to part number.
*. Patent No. 4521,764.
LOGDAC is a registered trademark of Analog Devices, Inc.
FEATURES
Dynamic Range 85.5 dB
Resolution 1.5 dB
Full 625 V Input Range Multiplying DAC
Full Military Temperature Range –558C to +1258C
Low Distortion
Low Power Consumption
Latch Proof Operation (Schottky Diodes Not Required)
Single 5 V to 15 V Supply
APPLICATIONS
Digitally Controlled AGC Systems
Audio Attenuators
Wide Dynamic Range A/D Converters
Sonar Systems
Function Generators
FUNCTIONAL DIAGRAM
PIN CONFIGURATION
AD7118–SPECIFICATIONS
(VDD = +5 V or +15 V, VIN = –10 V dc, IOUT = AGND = DGND = 0 V, output amplifier
AD544 except where noted)
Specifications subject to change without notice.
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for design guidance only and are not subject to test.
Specifications subject to change without notice.
(VDD = +5 V or +15 V, VIN = –10 V except where stated, IOUT = AGND = DGND =
0 V, output amplifier AD544 except where noted)
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
VDD (to DGND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+17 V
VIN (to AGND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±35 V
Digital Input Voltage to DGND . . . . .–0.3 V to VDD + 0.3 V
IOUT to AGND . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to VDD
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to VDD
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to VDD
Power Dissipation (Any Package)
To +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .450 mW
Derates Above +75°C by . . . . . . . . . . . . . . . . . . .6 mW/°C
Operating Temperature Range
Commercial (K, L Versions) . . . . . . . . . . . . .0°C to +70°C
Industrial (B, C Versions) . . . . . . . . . . . . .–25°C to +85°C
Extended (T, U Versions) . . . . . . . . . . . .–55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . .+300°C
*Stresses above those listed under “Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
TERMINOLOGY
RESOLUTION: Nominal change in attenuation when moving
between two adjacent binary codes.
MONOTONICITY: The device is monotonic if the analog out-
put decreases (or remains constant) as the digital code increases.
FEEDTHROUGH ERROR: That portion of the input signal
which reaches the output when all digital inputs are high. See
section on Applications.
OUTPUT LEAKAGE CURRENT: Current which appears on
the IOUT terminal with all digital inputs high.
TOTAL HARMONIC DISTORTION: Is a measure of the
harmonics introduced by the circuit when a pure sinusoid is
applied to the input. It is expressed as the harmonic energy
divided by the fundamental energy at the output.
ACCURACY: Is the difference (measured in dB) between the
ideal transfer function as listed in Table I and the actual transfer
function as measured with the device.
OUTPUT CAPACITANCE: Capacitance from IOUT to
ground.
DIGITAL-TO-ANALOG GLITCH IMPULSE: The amount
of charge injected from the digital inputs to the analog output
when the inputs change state. This is normally specified as the
area of the glitch in either pA-secs or nV-secs depending upon
whether the glitch is measured as a current or voltage signal.
Digital charge injection is measured with VIN = AGND.
PROPAGATION DELAY: This is a measure of the internal
delays of the circuit and is defined as the time from a digital in-
put change to the analog output current reaching 90% of its
final value.
INTERMODULATION DISTORTION: Is a measure of the
interaction which takes place within the circuit between two
sinusoids applied simultaneously to the input.
The reader is referred to Hewlett Packard Application Note 192
for further information.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7118 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
AD7118
CIRCUIT DESCRIPTION
GENERAL CIRCUIT INFORMATION
The AD7118 consists of a 17-bit R-2R CMOS multiplying D/A
converter with extensive digital input logic. The logic translates
the 6-bit binary input into a 17-bit word which is used to drive
the D/A converter. Table I gives the nominal output voltages
(and levels relative to 0 dB = 10 V) for all possible input codes.
The transfer function for the circuit of Figure 1 is given by: =−VIN10exp−1.5N
or VO
VINdB
=−1.5N
where N is the binary input for values 0 to 57. For 60 ≤ N ≤ 63
the output is zero. See note 3 at bottom of Table I.
Figure 1.Typical Circuit Configuration
EQUIVALENT CIRCUIT ANALYSIS
Figure 2 shows a simplified circuit of the D/A converter section
of the AD7118 and Figure 3 gives an approximate equivalent
circuit.
The current source ILEAKAGE is composed of surface and junc-
tion leakages and as with most semiconductor devices, roughly
doubles every 10°C–see Figure 10. The resistor RO as shown in
Figure 3 is the equivalent output resistance of the device which
varies with input code (excluding all 0’s code) from 0.8R to
2R. R is typically 12 kΩ. COUT is the capacitance due to the
N-channel switches and varies from about 50 pF to 80 pF de-
pending upon the digital input. For further information on
CMOS multiplying D/A converters refer to “Application Guide
to CMOS Multiplying D/A Converters” which is available from
Analog Devices, Publication Number G479–15–8/78.
Figure 2.Simplified D/A Circuit of AD7118
Figure 3.Equivalent Analog Output Circuit of AD7118
Table I.Ideal Attenuation vs. Input Code
DYNAMIC PERFORMANCE
The dynamic performance of the AD7118 will depend upon the
gain and phase characteristics of the output amplifier, together
with the optimum choice of PC board layout and decoupling
components. Figure 4 shows a printed circuit layout which
minimizes feedthrough from VIN to the output in multiplying
applications. Circuit layout is most important if the optimum
performance of the AD7118 is to be achieved. Most application
problems stem from either poor layout, grounding errors, or in-
appropriate choice of amplifier.
Figure 4.Suggested Layout for AD7118 and Op Amp
It is recommended that when using the AD7118 with a high
speed amplifier, a capacitor C1 be connected in the feedback
path as shown in Figure 1. This capacitor, which should be
between 30 pF and 50 pF, compensates for the phase lag intro-
duced by the output capacitance of the D/A converter. Figures 5
and 6 show the performance of the AD7118 using the AD517, a
fully compensated high gain superbeta amplifier, and the
AD544, a fast FET input amplifier. The performance without
C1 is shown in the middle trace and the response with C1 in
circuit is shown in the bottom trace.
Figure 5.Response of AD7118 with AD517L
Figure 6.Response of AD7118 with AD544S
In conventional CMOS D/A converter design parasitic
capacitance in the N-channel D/A converter switches can give
coupling across the parasitic capacitance. It should be noted
that the accuracy of the AD7118 improves as VDD is increased
(see Figure 8) but the device maintains monotonic behavior to
at least –66 dB in the range 5 ≤ VDD ≤ 15 volts.
For operation beyond 250 kHz, capacitor C1 may be reduced in
value. This gives an increase in bandwidth at the expense of a
poorer transient response as shown in Figures 6 and 11. In cir-
cuits where C1 is not included the high frequency roll-off point
is primarily determined by the characteristics of the output am-
plifier and not the AD7118.
Feedthrough and absolute accuracy for attenuation levels be-
yond 42 dB are sensitive to output leakage current effects. For
this reason it is recommended that the operating temperature of
the AD7118 be kept as close to 25°C as is practically possible,
particularly where the device’s performance at high attenuation
levels is important. A typical plot of leakage current vs. tempera-
ture is shown in Figure 10.
Some solder fluxes and cleaning materials can form slightly con-
ductive films which cause leakage effects between analog input
and output. The user is cautioned to ensure that the manufac-
turing process for circuits using the AD7118 does not allow
such films to form. Otherwise the feedthrough, accuracy and
maximum usable range will be affected.
STATIC ACCURACY PERFORMANCE
The D/A converter section of the AD7118 consists of a 17-bit
R-2R type converter. To obtain optimum static performance at
this level of resolution it is necessary to pay great attention to
amplifier selection, circuit grounding, etc.
Amplifier input bias current results in a dc offset at the output
of the amplifier due to the current flowing through the feedback
resistor RFB. It is recommended that an amplifier with an input
bias current of less than 10 nA be used (e.g., AD517 or AD544)
to minimize this offset.
Another error arises from the output amplifier’s input offset
voltage. The amplifier is operated with a fixed feedback resis-
tance, but the equivalent source impedance (the AD7118 out-
put impedance) varies as a function of attenuation level. This
has the effect of varying the “noise” gain of the amplifier, thus
creating a varying error due to amplifier offset voltage. To
achieve an output offset error less than one half the smallest step
size, it is recommended that an amplifier with less than 50 μV of
input offset be used (such as the AD517 or AD OP07).
If dc accuracy is not critical in the application, it should be
noted that amplifiers with offset voltage up to approximately 2
millivolts can be used. Amplifiers with higher offset voltage may
cause audible “thumps” due to dc output changes.
The AD7118 accuracy is specified and tested using only the
internal feedback resistor. It is not recommended that “gain”
trim resistors be used with the AD7118 because the internal
logic of the circuit executes a proprietary algorithm which ap-
proximates a logarithmic curve with a binary D/A converter: as a
result no single point on the attenuator transfer function can be
guaranteed to lie exactly on the theoretical curve. Any “gain-
error” (i.e., mismatch of RFB to the R-2R ladder) that may exist
AD7118
Figure 7.Digital Threshold & Power Supply Current vs.
Power Supply
Figure 8.DC Attenuation Error vs. Attenuation & VDD
Figure 9.DC Attenuation Error vs. Attenuation &
Temperature
Figure 10.Output Leakage Current as Temperature at
VDD = 5, 10 and 15 Volts
Figure 11.Frequency Response with AD544 and
AD517 Amplifiers
Figure 12.Distortion vs. Frequency Using AD544
Amplifier
–Typical Performance Characteristics
C628a–10–3/83
PRINTED IN U.S.A.

Partno	Mfg	Dc	Qty	Available	Descript
AD7118BQ	AD	N/a	13	avai	LOGDAC CMOS Logarithmic D/A Converter
AD7118CQ	AD	N/a	4	avai	LOGDAC CMOS Logarithmic D/A Converter
AD7118KN	AD	N/a	14	avai	LOGDAC CMOS Logarithmic D/A Converter
AD7118LN		N/a	74	avai	LOGDAC CMOS Logarithmic D/A Converter