AD7111KN ,LC2MOS LOGDAC Logarithmic D/A ConverterGENERAL DESCRIPTION®The LOGDAC AD7111/AD7111A are monolithic multiplyingD/A converters featuring wi ..
AD7111LN ,LC2MOS LOGDAC Logarithmic D/A Convertercharacteristics are included for design guidance only and are not subjectto test. V = +5 V, V = –10 ..
AD7111UQ/883B ,LC2MOS LOGDAC Logarithmic D/A ConverterCHARACTERISTICS AD711 except where noted)AD7111L/C/U Grades AD7111K/B/T GradesParameter T = +258CT ..
AD7112BN ,LC2MOS LOGDAC Dual Logarithmic D/A ConverterSPECIFICATIONS (V = +5 V 6 5%; 0UT A = OUT B = AGND = DGND = O V; V A = V B = 10 V)DD IN INParamete ..
AD7112BR ,LC2MOS LOGDAC Dual Logarithmic D/A ConverterCHARACTERISTICSV B = 10 V. Output amplifier AD712 except where noted.)INT =AT = –408C toAParameter ..
AD7112CN ,LC2MOS LOGDAC Dual Logarithmic D/A Converterspecifications T to T unless otherwise noted.)MIN MAX1C Version B VersionT =T=T =T =A A A AParamete ..
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AD7111ABN-AD7111ABR-AD7111ACR-AD7111BQ-AD7111KN-AD7111LN-AD7111UQ/883B
LC2MOS LOGDAC Logarithmic D/A Converter
REV.0
LC2MOS LOGDAC
Logarithmic D/A Converter
FUNCTIONAL BLOCK DIAGRAMS
FEATURES
Dynamic Range: 88.5 dB
Resolution: 0.375 dB
On-Chip Data Latches
+5 V Operation
AD7111A Pin Compatible with AD7524
Low Power
APPLICATIONS
Audio Attenuators
Sonar Systems
Function Generators
Digitally Controlled AGC System
GENERAL DESCRIPTIONThe LOGDAC AD7111/AD7111A are monolithic multiplying
D/A converters featuring wide dynamic range in a small pack-
age. Both DACs can attenuate an analog input signal over the
range 0 dB to 88.5 dB in 0.375 dB steps. They are available in
16-pin DIPs and SOIC packages. The AD7111 is also available
in a 20-terminal LCCC package.
The degree of attenuation across the DAC is determined by an
8-bit word applied to the onboard decode logic. This 8-bit word
is decoded into a 17-bit word which is then applied to a 17-bit
R-2R ladder. The very fine step resolution, which is available
over the entire dynamic range, is due to the use of this 17-bit
DAC.
The AD7111/AD7111A are easily interfaced to a standard 8-bit
MPU bus via an 8-bit data port and standard microprocessor
control lines. The AD7111 WR input is edge triggered and re-
quires a rising edge to load new data to the DAC. The AD7111A
WR is level triggered to allow transparent operation of the
latches, if required. It should also be noted that the AD7111A is
exactly pin and function-compatible with the AD7524, an in-
dustry standard 8-bit multiplying DAC. This allows an easy up-
grading of existing AD7524 designs which would benefit both
from the wider dynamic range and the finer step resolution of-
fered by the AD7111A.
The AD7111/AD7111A are fabricated in Linear Compatible
CMOS (LC2MOS), an advanced, mixed technology process that
combines precision bipolar circuits with low power CMOS logic.
LOGDAC is a registered trademark of Analog Devices, Inc.
PRODUCT HIGHLIGHTSWide Dynamic Range: 0 dB to 88.5 dB attenuation range in
0.375 dB steps.Small Package: The AD7111/AD7111A are available in
16-pin DIPs and SOIC packages.Transparent Latch Operation: By tying the CS and WR in-
puts low, the DAC latches in the AD7111A can be made
transparent.Fast Microprocessor Interface: Data setup times of 25 ns and
write pulse width of 57 ns make the AD7111A compatible
with modern microprocessors.
NOTESample tested at +25°C to ensure compliance.
Specifications subject to change without notice.
AD7111–ELECTRICAL CHARACTERISTICS
AD7111/AD7111A–SPECIFICATIONS
(VDD = +5 V, VIN = –10 V dc, IOUT = AGND = DGND = O V output amplifier
AD711 except where noted)
AC PERFORMANCE CHARACTERISTICSThese characteristics are included for design guidance only and are not subject
to test. VDD = +5 V, VIN = –10 V dc except where noted, IOUT = AGND = DGND = O V, output amplifier AD711 except where noted.Specifications subject to change without notice.
AD7111/AD7111A
AD7111A–ELECTRICAL CHARACTERISTICSNOTESample tested at +25°C to ensure compliance.
Specifications subject to change without notice.
(VDD = +5 V, VIN = –10 V dc, IOUT = AGND = DGND = O V output amplifier
AD711 except where noted)
AC PERFORMANCE CHARACTERISTICSThese characteristics are included for design guidance only and are not subject
to test. VDD = +5 V, VIN = –10 V dc except where noted, IOUT = AGND = DGND = O V, output amplifier AD711 except where noted.DC Supply Rejection, ΔGain/ΔVDD
Output Noise Voltage Density
Specifications subject to change without notice.
AD7111/AD7111A
ORDERING GUIDES
AD7111A ORDERING GUIDENOTEN = Plastic DIP; R = SOIC.
Power Dissipation, LCCC . . . . . . . . . . . . . . . . . . . . . . . .1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . .76°C/W
Lead Temperature (Soldering, 10 secs) . . . . . . . . .+300°C
Operating Temperature Range
Commercial (K, L Versions) . . . . . . . . . . . . .0°C to +70°C
Industrial (B, C Versions) . . . . . . . . . . . . .–40°C to +85°C
Extended (T, U Versions) . . . . . . . . . . . .–55°C to +125°C
Storage Temperature Range . . . . . . . . . . . .–65°C to +150°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only, and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS*(TA = +25°C unless otherwise noted)
VDD (to DGND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7 V
VIN (to AGND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±35 V
Digital Input Voltage to DGND . . . . .–0.3 V to VDD + 0.3 V
IOUT to AGND . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to VDD
VRFB to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±35 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to VDD
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to VDD
Power Dissipation, DIP . . . . . . . . . . . . . . . . . . . . . . . . . .1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . .117°C/W
Lead Temperature (Soldering, 10 secs) . . . . . . . . .+300°C
Power Dissipation, SOIC . . . . . . . . . . . . . . . . . . . . . . . . .1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . .75°C/W
Lead Temperature (Soldering)
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . .215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . .220°C
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7111/AD7111A features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
ACCURACY: The difference (measured in dB) between theideal transfer function as listed in Table I and the actual transfer
function as measured with the device.
OUTPUT CAPACITANCE: Capacitance from IOUT toground.
DIGITAL-TO-ANALOG GLITCH IMPULSE: The amountof charge injected from the digital inputs to the analog output
when the inputs change state. This is normally specified as the
area of the glitch in either pA-secs or nV-secs depending upon
whether the glitch is measured as a current or voltage signal.
Glitch impulse is measured with VIN = AGND.
PROPAGATION DELAY: This is a measure of the internaldelays of the circuit and is defined as the time from a digital in-
AD7111 ORDERING GUIDENOTESTo order MIL-STD-883B, Class B processed parts, add /883B to part number.
Contact local sales office for military data sheet and availability.N = Plastic DIP; Q = Cerdip; E = LCCC; R = SOIC.
TERMINOLOGY
RESOLUTION: Nominal change in attenuation when movingbetween two adjacent codes.
MONOTONICITY: The device is monotonic if the analog out-put decreases (or remains constant) as the digital code increases.
FEEDTHROUGH ERROR: That portion of the input signalwhich reaches the output when all digital inputs are high. See
section on Applications.
OUTPUT LEAKAGE CURRENT: Current which appears onthe IOUT terminal with all digital inputs high.
TOTAL HARMONIC DISTORTION: A measure of theharmonics introduced by the circuit when a pure sinusoid is
applied to the input. It is expressed as the harmonic energy
PIN CONFIGURATIONSWrite Cycle Timing Diagram
CIRCUIT DESCRIPTION
GENERAL CIRCUIT DESCRIPTIONThe AD7111/AD7111A consists of a 17-bit R-2R CMOS mul-
tiplying D/A converter with extensive digital logic. The logic
translates the 8-bit binary input into a 17-bit word which is
used to drive the D/A converter. Input data on the D7-D0 bus
is loaded into the input data latches using CS and WR control
signals. When using the AD7111, the rising edge of WR latches
the input data and initiates the internal data transfer to the de-
coder. A minimum time tRFSH, the refresh time, is required for
the data to propagate through the decoder before a new data
write is attempted.
In contrast, the AD7111A WR input is level triggered to allow
transparent operation of the latches if required.
The transfer function for the circuit of Figure 1 is given by:
VO = –VIN 10 exp –
0.375N
or O
VIN dB = –0.375 N
where 0.375 is the step size (resolution) in dB and N is the in-
put code in decimal for values 0 to 239. For 240 ≤ N ≤ 255 the
output is zero. Table I gives the output attenuation relative to
0 dB for all possible input codes.
Figure 1.Typical Circuit Configuration
The graphs on the last page give a pictorial representation of the
specified accuracy and monotonic ranges for all grades of the
AD7111/AD7111A. High attenuation levels are specified with
less accuracy than low attenuation levels. The range of mono-
tonic behavior depends upon the attenuation step size used.
DIP/SOICLCCC
Table I.Ideal Attenuation in dB vs. Input Code
D3-D0
AD7111/AD7111AFor example, the AD7111L is guaranteed monotonic in 0.375 dB
steps from 0 dB to –54 dB inclusive and in 0.75 dB steps from
0 dB to –72 dB inclusive. To achieve monotonic operation over
the entire 88.5 dB range it is necessary to select input codes so
that the attenuation step size at any point is consistent with the
step size guaranteed for monotonic operation at that point.
EQUIVALENT CIRCUIT ANALYSISFigure 2 shows a simplified circuit of the D/A converter section
of the AD7111/AD7111A, and Figure 3 gives an approximate
equivalent circuit.
The current source ILEAKAGE is composed of surface and junc-
tion leakages. The resistor R0 as shown in Figure 3 is the
equivalent output resistance of the device which varies with in-
put code (excluding all 0s code) from 0.8R to 2R. R is typically
12 kΩ. COUT is the capacitance due to the N channel switches
and varies from about 20 pF to 50 pF depending upon the digi-
tal input. For further information on CMOS multiplying D/A
converters, refer to “CMOS DAC Application Guide” which is
available from Analog Devices, Publication Number
G872b–8–1/89.
Figure 2.Simplified D/A Circuit of AD7111/AD7111A
Figure 3.Equivalent Analog Output Circuit of
AD7111/AD7111A
DYNAMIC PERFORMANCEThe dynamic performance of the AD7111/AD7111A will depend
upon the gain and phase characteristics of the output amplifier,
together with the optimum choice of PC board layout and
decoupling components. Circuit layout is most important if the
optimum performance of the AD7111/AD7111A is to be
achieved. Most application problems stem from either poor lay-
out, grounding errors, or inappropriate choice of amplifier.
It is recommended that when using thc AD7111/AD7111A with
a high speed amplifier, a capacitor (C1) he connected in the
feedback path as shown in Figure 1. This capacitor, which
should be between 10 pF and 30 pF, compensates for the phase
lag introduced by the output capacitance of the D/A converter.
Figures 4 and 5 show the performance of the AD7111/AD7111A
Figure 5.
In conventional CMOS D/A converter design, parasitic capaci-
tance in N-channel D/A converter switches can give rise to
glitches on the D/A converter output. These glitches result from
digital feedthrough. The AD7111/AD7111A has been designed
to minimize these glitches as much as possible.
For operation beyond 250 kHz, capacitor C1 may be reduced in
value. This gives an increase in bandwidth at the expense of a
poorer transient response as shown in Figures 5 and 11. In cir-
cuits where C1 is not included, the high frequency roll-off point
is primarily determined by the characteristics of the output am-
plifier and not the AD7111/AD7111A.
Feedthrough and absolute accuracy are sensitive to output leak-
age current effects. For this reason it is recommended that the
operating temperature of the AD7111/AD7111A be kept as
close to 25°C as is practically possible, particularly where the
device’s performance at high attenuation levels is important. A typi-
cal plot of leakage current vs. temperature is shown in Figure 10.
Some solder fluxes and cleaning materials can form slightly con-
ductive films which cause leakage effects between analog
input and output. The user is cautioned to ensure that the
manufacturing process for circuits using thc AD7111/AD7111A
does not allow such films to form. Otherwise the feedthrough,
accuracy and maximum usable range will be affected.
STATIC ACCURACY PERFORMANCEThe D/A converter section of the AD7111/AD7111A consists of
a 17-bit R-2R type converter. To obtain optimum static perfor-
mance at this level of resolution it is necessary to pay great
attention to amplifier selection, circuit grounding, etc.
