AD707KR ,Ultralow Drift Op AmpSpecifications in boldface are tested on all production units at final electrical test. Results fro ..
AD708 ,Ultralow Offset Voltage Dual Op AmpCHARACTERISTICSOffset Voltage 80 50 30 μVT to T 150 75 50 μVMIN MAXOffset Voltage Drift 1.0 0.4 0.3 ..
AD708AH ,Ultralow Offset Voltage Dual Op Ampspecifications are guaranteed after 5 minutes of operation at T = +25°C.A2Matching is defined as th ..
AD708AQ ,Ultralow Offset Voltage Dual Op AmpSpecifications in boldface are tested on all production units at final electrical test. Results fr ..
AD708AQ. ,Ultralow Offset Voltage Dual Op AmpSpecifications subject to change without notice.1ABSOLUTE MAXIMUM RATINGSMETALIZATION PHOTOGRAPHSup ..
AD708BQ ,Ultralow Offset Voltage Dual Op AmpCharacteristics30 mV max Offset Voltage Match0.3 mV/8C max Offset Voltage Drift Match130 dB min CMR ..
ADC12281CIVT ,12-Bit, 20 MSPS Single-Ended Input, Pipelined A/D ConverterGeneral Descriptionn Internal reference buffer amplifierTheADC12281 is a monolithic CMOS analog-to- ..
ADC122S051CIMMX , 2 Channel, 500 kSPS 12-Bit A/D Converter
ADC122S051CIMMX/NOPB ,2 Channel, 200 ksps to 500 ksps 12-Bit A/D Converter 8-VSSOP -40 to 85FEATURES DESCRIPTIONThe ADC122S051/ADC122S051Q is a low-power,2• Specified Over a Range of Sample R ..
ADC1241CIJ ,Self Calibrating 12-Bit Plus sign microP-Compatible A/D Converter with Sample-and-Hold [Life-time buy]ADC1241Self-Calibrating12-BitPlusSignmP-CompatibleA/DConverterwithSample-and-HoldNovember1994ADC124 ..
ADC1241CMJ ,Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-HoldADC1241Self-Calibrating12-BitPlusSignmP-CompatibleA/DConverterwithSample-and-HoldNovember1994ADC124 ..
ADC12441CIJ ,Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample and Hold [Life-time buy]ApplicationsYDigital signal processingThe ADC12441 is a CMOS 12-bit plus sign successive ap-Yproxim ..
AD707AH-AD707AQ-AD707AR-AD707BQ-AD707JN-AD707JR-AD707JR-REEL-AD707KN-AD707KR
Ultralow Drift Op Amp
AD707–SPECIFICATIONS
(@ +258C and 615 V, unless otherwise noted)INPUT BIAS CURRENT
OFFSET CURRENT
INPUT VOLTAGE NOISE
OPEN-LOOP GAIN
POWER SUPPLY
INPUT RESISTANCE
OUTPUT CHARACTERISTICS
POWER SUPPLY
ABSOLUTE MAXIMUM RATINGS1Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . . 500 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . +VS and –VS
Storage Temperature Range (Q, H) . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . +300°C
NOTESStresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.8-pin plastic package: θJA = 165°C/Watt; 8-pin cerdip package: θJA = 110°C/Watt;
8-pin small outline package: θJA = 155°C/Watt; 8-pin header package: θJA =
200°C/Watt.
ORDERING GUIDE
METALIZATION PHOTOGRAPHDimensions shown in inches and (mm).
Contact factory for latest dimensions.
NULL
+VS
VOUT
–VS
+IN
–IN
NULL
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD707 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
AD707–Typical Characteristics
+VS
–VS025
+1.5
+0.5
+1.0
OUTPUT VOLTAGE SWING –
(REFERRED TO SUPPLY VOLTAGES)Figure 2.
vs. Supply Voltage
NUMBER OF UNITS
–0.4Figure 5.
Offset Voltage Drift
FREQUENCY – Hz
INPUT VOLTAGE NOISE – nV/Figure 8.Input Noise Spectral
Density
Figure 9.0.1 Hz to 10 Hz Voltage
Noise
SUPPLY VOLTAGE – ±V
+VS
–VS
+1.5
+0.5
+1.0
COMMOM-MODE VOLTAGE LIMIT – V(REFERRED TO SUPPLY VOLTAGES)Figure 1.Input Common-Mode
Range vs. Supply Voltage
TIME AFTER POWER ON – Minutes
CHANGE IN OFFSET – µV04123Figure 4.Offset Voltage Warm-Up
Drift
DIFFERENTIAL VOLTAGE – ±V0110010
INVERTING OR
NONINVERTING INPUT CURRENT – mAFigure 7.Input Current vs.
Differential Input Voltage
TEMPERATURE – °C
OPEN-LOOP GAIN –
V/µVFigure 10.Open-Loop Gain vs.
Temperature
FREQUENCY – Hz
COMMON-MODE REJECTION – dB
1600.11101001k10k100k1M
120Figure 13.Common-Mode
Rejection vs. Frequency
SUPPLY VOLTAGE – ±V
SUPPLY CURRENT – mA03246912151821Figure 16.Supply Current vs.
Supply Voltage
SUPPLY VOLTAGE – V
OPEN-LOOP GAIN –
V/µV
0255101520Figure 11.Open-Loop Gain vs.
Supply Voltage
FREQUENCY – Hz
OUTPUT VOLTAGE – V p-p1k10k1M100kFigure 14.Large Signal Frequency
Response
Figure 17.Small Signal Transient
Response; AV = +1, RL = 2 kΩ,
CL = 50 pF
Figure 12.Open-Loop Gain and
Phase vs. Frequency
Figure 15.Power Supply Rejection
vs. Frequency
Figure 18.Small Signal Transient
Response; AV = +1, RL = 2 kΩ,
CL = 1000 pF
AD707
OPERATION WITH A GAIN OF 100Demonstrating the outstanding dc precision of the AD707 in
practical applications, Table I shows an error budget calculation
for the gain of –100 configuration shown in Figure 21.
Table I.Error BudgetIOS
Gain (2 kΩ Load)
VOS Drift
Total Unadjusted Error
@ +25°C= 168 ppm > 12 Bits
@ –55°C to +125°C= 268 ppm > 11 Bits
With Offset Calibrated Out
@ +25°C= 17 ppm > 15 Bits
@ –55°C to +125°C= 117 ppm > 13 Bits
+VS
AD707
0.1µF
–VS
99Ω
VOUT
0.1µFVIN
10kΩ
100ΩFigure 21.Gain of –100 Configuration
Although the initial offset voltage of the AD707 is very low, it is
nonetheless the major contributor to system error. In cases
requiring additional accuracy, the circuit shown in Figure 19
can be used to null out the initial offset voltage. This method
will also cancel the effects of input offset current error. With the
offsets nulled, the AD707C will add less than 17 ppm of error.
This error budget assumes no error in the resistor ratio and no
errors from power supply variation (the 120 dB minimum PSRR
of the AD707C makes this a good assumption). The external
resistors can cause gain error from mismatch and drift over
temperature.
OFFSET NULLINGThe input offset voltage of the AD707 is the lowest available in
a bipolar op amp, but if additional nulling is required, the
circuit shown in Figure 19 offers a null range of 200μV. For
wider null capability, omit R1 and substitute a 20 kΩ potenti-
ometer for R2.
10kΩ0.1µF
+VS
–VSFigure 19.External Offset Nulling and Power Supply
Bypassing
GAIN LINEARITY INTO A 1 kΩ LOADThe gain and gain linearity of the AD707 are the highest
available among monolithic bipolar amplifiers. Unlike other dc
precision amplifiers, the AD707 shows no degradation in gain or
gain linearity when driving loads in excess of 1 kΩ over a ±10 V
output swing. This means high gain accuracy is assured over the
output range. Figure 20 shows the gain of the AD707, OP07, and
the OP77 amplifiers when driving a 1 kΩ load.
The AD707 will drive 10 mA of output current with no signifi-
cant effect on its gain or linearity.
OUTPUT VOLTAGE – V
CHANGE IN OFFSET VOLTAGE – 10µV/Div
–1515–10–50510Figure 20.Gain Linearity of the AD707 vs.
Other DC Precision Op Amps
