AD774BAD ,Complete 12-Bit A/D ConvertersSpecifications subject to change without notice.
AD774BAR ,Complete 12-Bit Successive Approximation Analog-to-Digital Converters With Three-State Output and 8 us ConversionFEATURES FUNCTIONAL BLOCK DIAGRAMComplete Monolithic 12-Bit A/D Converters withReference, Clock, an ..
AD774BBD ,Complete 12-Bit A/D ConvertersFEATURESComplete Monolithic 12-Bit A/D Converters withReference, Clock, and Three-State Output Buff ..
AD774BBR , Complete 12-Bit A/D Converters
AD774BJN ,Complete 12-Bit A/D ConvertersSpecifications shown in boldface are tested on all devices at final electrical test at T , +25°C, a ..
AD774BKN ,Complete 12-Bit A/D ConvertersCompletea12-Bit A/D ConvertersAD674B*/AD774B*FUNCTIONAL BLOCK DIAGRAM
ADM1232ARW ,Microprocessor Supervisory CircuitFEATURES FUNCTIONAL BLOCK DIAGRAMSuperior Upgrade for MAX1232 and Dallas DS1232Low Power Consumptio ..
ADM1385ARS ,Low Power, +3.3 V, RS-232 Line Drivers/ReceiversGENERAL DESCRIPTIONThe ADM3202/ADM3222/ADM1385 transceivers are high+3.3V TO +6.6VC1+ V0.1F + CCC3 ..
ADM1385ARS-REEL ,High-Speed, 2-Channel RS232/V.28 Interface Devicesspecifications and operates at data ratesEN SDGNDup to 460 kbps.*INTERNAL 5k PULL-DOWN RESISTOR O ..
ADM1385ARS-REEL7 ,High-Speed, 2-Channel RS232/V.28 Interface DevicesCHARACTERISTICSOperating Voltage Range 3.0 3.3 5.5 VV Power Supply Current 1.3 3 mA No LoadCC812 mA ..
ADM1485AN ,+-5 V Low Power EIA RS-485 Transceiverfeatures highoutput impedance when disabled and also when powered down.REV. AInformation furnished ..
ADM1485AR ,+-5 V Low Power EIA RS-485 TransceiverSpecifications subject to change without notice.(V = +5 V 5%. All
AD674BAD-AD674BBD-AD674BJN-AD674BKN-AD674BTD-AD774BAD-AD774BBD-AD774BJN-AD774BKN-AD774BTD
Complete 12-Bit A/D Converters
FUNCTIONAL BLOCK DIAGRAM
DIGITAL
DATA
OUTPUTS
DB11 (MSB)
DB0 (LSB)
DB1
DB2
DB3
DB4
DB7
DB6
DB5
DB8
DB9
DB10
STATUS
STS
REF OUT
REF IN
VEE
BIPOFF
10VIN
20VIN
LOGIC
+5V SUPPLY
BYTE ADDRESS/
SHORT CYCLE
CHIP ENABLE
+10V REFERENCE
+12/+15V SUPPLY
ANALOG COMMON
REFERENCE INPUT12/ 15V SUPPLY_
BIPOLAR OFFSET
10V SPAN INPUT
20V SPAN INPUT
12/8
DATA MODE SELECT
CHIP SELECT
R/C
READ/ CONVERT
DIGITAL COMMON DCREV.B
Complete
12-Bit A/D Converters
FEATURES
Complete Monolithic 12-Bit A/D Converters with
Reference, Clock, and Three-State Output Buffers
Industry Standard Pinout
High Speed Upgrades for AD574A
8- and 16-Bit Microprocessor Interface
8 ms (max) Conversion Time (AD774B)
15 ms (max) Conversion Time (AD674B)65 V, 610 V, 0-10 V, 0-20 V Input Ranges
Commercial, Industrial and Military Temperature
Range Grades
MIL-STD-883 Compliant Versions Available
PRODUCT DESCRIPTIONThe AD674B and AD774B are complete 12-bit successive-
approximation analog-to-digital converters with three-state
output buffer circuitry for direct interface to 8- and 16-bit
microprocessor busses. A high precision voltage reference and
clock are included on chip, and the circuit requires only power
supplies and control signals for operation.
The AD674B and AD774B are pin compatible with the industry
standard AD574A, but offer faster conversion time and bus-
access speed than the AD574A and lower power consumption.
The AD674B converts in 15 μs (maximum) and the AD774B
converts in 8 μs (maximum).
The monolithic design is implemented using Analog Devices’
BiMOS II process allowing high performance bipolar analog cir-
cuitry to be combined on the same die with digital CMOS logic.
Offset, linearity and scaling errors are minimized by active laser-
trimming of thin-film resistors.
Five different grades are available. The J and K grades are speci-
fied for operation over the 0°C to +70°C temperature range.
The A and B grades are specified from –40°C to +85°C, the T
grade is specified from –55°C to +125°C. The J and K grades
are available in a 28-pin plastic DIP or 28-lead SOIC. All other
grades are available in a 28-pin hermetically sealed ceramic
DIP.
*. Patent Nos. 4,250,445; 4,808,908; RE30586.
PRODUCT HIGHLIGHTSIndustry Standard Pinout: The AD674B and AD774B utilize
the pinout established by the industry standard AD574A.Analog Operation: The precision, laser-trimmed scaling and
bipolar offset resistors provide four calibrated ranges: 0 to
+10 V and 0 to +20 V unipolar; –5 V to +5 V and –10 V to
+10 V bipolar. The AD674B and AD774B operate on +5 V
and ±12 V or ±15 V power supplies.Flexible Digital Interface: On-chip multiple-mode three-state
output buffers and interface logic allow direct connection to
most microprocessors. The 12 bits of output data can be
read either as one 12-bit word or as two 8-bit bytes (one with
8 data bits, the other with 4 data bits and 4 trailing zeros).The internal reference is trimmed to 10.00 volts with 1%
maximum error and 10 ppm/°C typical temperature coeffi-
cient. The reference is available externally and can drive up
to 2.0 mA beyond the requirements of the converter and bi-
polar offset resistors.The AD674B and AD774B are available in versions compli-
ant with MIL-STD-883. Refer to the Analog Devices Mili-
tary Products Databook or current AD674B/AD774B/883B
data sheet for detailed specifications.
AD674B/AD774B—SPECIFICATIONSNOTESAdjustable to zero.Includes internal voltage reference error.Maximum change from +25°C value to the value at TMIN or TMAX.Tested with REF OUT tied to REF IN through 50 Ω resistor, VCC = +16.5 V, VEE = –16.5 V, VLOGIC = +5.5 V, and outputs in high-Z mode.
(TMIN to TMAX with VCC = +15 V 6 10% or +12 V 6 5%,
VLOGIC = +5 V 6 10%, VEE = –15 V 6 10% or –12 V 6 5% unless otherwise noted)
AD674B/AD774B
AD674B/AD774B
CONVERTER START TIMING (Figure 1)STS Delay from CE
CE Pulse Width
READ TIMING—FULL CONTROL MODE (Figure 2)Data Valid After CE Low
NOTEStDD is measured with the load circuit of Figure 3a and is defined as the time required
for an output to cross 0.4 V or 2.4 V.0°C to TMAX.At –40°C.At –55°C.tHL is defined as the time required for the data lines to change 0.5 V when loaded with
the circuit of Figure 3b.
VIL
VOL
DIGITAL SPECIFICATIONS
(for all grades TMIN to TMAX with VCC = +15 V 6 10% or +12 V 6 5%, VLOGIC = +5 V 6 10%,
VEE = –15 V 6 10% or –12 V 6 5%)
SWITCHING SPECIFICATIONS
(for all grades TMIN to TMAX with VCC = +15 V 6 10% or +12 V 6 5%,
VLOGIC = +5 V 6 10%, VEE = –15 V 6 10% or –12 V 6 5%; unless otherwise noted)
HIGH IMPEDANCE
STS
DB11 – DB0
R/CFigure 1. Convert Start Timing
STS
DB11 – DB0
R/CFigure 2. Read Cycle Timing
High-Z to Logic 1 High-Z to Logic 0
Figure 3a. Load Circuit for Access Time Test
TIMING—STAND-ALONE MODE (Figures 4a and 4b)Low R/C Pulse Width
Data Valid After R/C Low
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*VCC to Digital Common . . . . . . . . . . . . . . . . . . .0 to +16.5 V
VEE to Digital Common . . . . . . . . . . . . . . . . . . . . .0 to –16.5 V
VLOGIC to Digital Common . . . . . . . . . . . . . . . . . . . .0 to +7 V
Analog Common to Digital Common . . . . . . . . . . . . . . .±1 V
Digital Inputs to Digital Common . . . –0.5 V to VLOGIC +0.5 V
Analog Inputs to Analog Common . . . . . . . . . . . . .VEE to VCC
20 VIN to Analog Common . . . . . . . . . . . . . . . . . . . . . .±24 V
REF OUT . . . . . . . . . . . . . . . . . .Indefinite Short to Common
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Momentary Short to VCC
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . .+175°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . .825 mW
Lead Temperature, Soldering . . . . . . . . . . . . . .300°C, 10 sec
Storage Temperature . . . . . . . . . . . . . . . . . . .–65°C to +150°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Flgure 4a. Stand-Alone Mode Timing Low Pulse R/C
Figure 4b. Stand-Alone Mode Timing High Pulse for R/C
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
ORDERING GUIDENOTESFor details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military
Products Databook or current AD674B/ AD774B/883B data sheet.N = Plastic DIP; D = Hermetic DIP; R = Plastic SOIC.
AD674B/AD774B
DEFINITION OF SPECIFICATIONSLINEARITY ERROR
Linearity error refers to the deviation of each individual code
from a line drawn from “zero” through “full scale.” The point
used as “zero” occurs 1/2 LSB (1.22 mV for 10 volt span) be-
fore the first code transition (all zeroes to only the LSB “on”).
“Full scale” is defined as a level 1 1/2 LSB beyond the last code
transition (to all ones). The deviation of a code from the true
straight line is measured from the middle of each particular
code.
The K, B. and T grades are guaranteed for maximum nonlinear-
ity of ±1/2 LSB. For these grades, this means that an analog
value which falls exactly in the center of a given code width will
result in the correct digital output code. Values nearer the upper
or lower transition of the code width may produce the next up-
per or lower digital output code. The J and A grades are guaran-
teed to ±1 LSB max error. For these grades, an analog value
which falls within a given code width will result in either the
correct code for that region or either adjacent one.
Note that the linearity error is not user adjustable.
DIFFERENTIAL LINEARITY ERROR (NO MISSING
CODES)
A specification which guarantees no missing codes requires that
every code combination appear in a monotonic increasing se-
quence as the analog input level is increased. Thus every code
must have a finite width. The AD674B and AD774B guarantee
no missing codes to 12-bit resolution, requiring that all 4096
codes must be present over the entire operating temperature
ranges.
UNIPOLAR OFFSET
The first transition should occur at a level 1/2 LSB above analog
common. Unipolar offset is defined as the deviation of the ac-
tual transition from that point. This offset can be adjusted as
discussed later. The unipolar offset temperature coefficient
specifies the maximum change of the transition point over tem-
perature, with or without external adjustment.
BIPOLAR OFFSET
In the bipolar mode the major carry transition (0111 1111 1111
to 1000 0000 0000) should occur for an analog value 1/2 LSB
below analog common. The bipolar offset error and temperature
coefficient specify the initial deviation and maximum change in
the error over temperature.
QUANTIZATION UNCERTAINTY
Analog-to-digital converters exhibit an inherent quantization
uncertainty of ±1/2 LSB. This uncertainty is a fundamental
characteristic of the quantization process and cannot be reduced
for a converter of given resolution.
LEFT-JUSTIFIED DATA
The output data format is left-justified. This means that the
data represents the analog input as a fraction of full scale, rang-
ing from 0 to 4095/4096. This implies a binary point 4095 to
the left of the MSB.
FULL-SCALE CALIBRATION ERROR
The last transition (from 1111 1111 1110 to 1111 1111 1111)
should occur for an analog value 1 1/2 LSB below the nominal
full scale (9.9963 volts for 10.000 volts full scale). The full-scale
calibration error is the deviation of the actual level at the last
transition from the ideal level. This error, which is typically 0.05
to 0.1% of full scale, can be trimmed out as shown in Figures 7
and 8. The full-scale calibration error over temperature is given
with and without the initial error trimmed out. The temperature
coefficients for each grade indicate the maximum change in
the full-scale gain from the initial value using the internal 10 V
reference.
TEMPERATURE DRIFT
The temperature drift for full-scale calibration, unipolar offset,
and bipolar offset specifies the maximum change from the initial
(+25°C) value to the value at TMIN or TMAX.
POWER SUPPLY REJECTION
The standard specifications assume use of +5.00 V and
±15.00 V or ±12.00 V supplies. The only effect of power supply
error on the performance of the device will be a small change in
the full-scale calibration. This will result in a linear change in all
low-order codes. The specifications show the maximum full-
scale change from the initial value with the supplies at the vari-
ous limits.
CODE WIDTH
A fundamental quantity for A/D converter specifications is the
code width. This is defined as the range of analog input values
for which a given digital output code will occur. The nominal
value of a code width is equivalent to 1 least significant bit
(LSB) of the full-scale range or 2.44 mV out of 10 volts for a
12-bit ADC.
