AD6459ARS Fast Delivery |IC PHOENIX CO.,LIMITED

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AD6459ARS
GSM 3 V Receiver IF Subsystem
REV.0
GSM 3 V Receiver IF Subsystem
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Fully Compliant with Standard and Enhanced GSM
Specification
–11 dBm Input 1 dB Compression Point
0 dBm Input Third Order Intercept
10 dB SSB Noise Figure (50 V)
DC-500 MHz RF and LO Bandwidths
Linear IF Amplifier
Linear-in-dB and Stable over Temperature
Voltage Gain Control
Quadrature Demodulator
On-Board Phase-Locked Quadrature Oscillator
Demodulates IFs from 5 MHz to 50 MHz
Low Power
8 mA at Midgain
2 mA Sleep Mode Operation
2.7 V to 5.5 V Operation
Interfaces to AD7013, AD7015 and AD6421 Baseband
Converters
20-Lead SSOP
GENERAL DESCRIPTION
The AD6459 is a 3 V, low power receiver IF subsystem for
operation at input frequencies as high as 500 MHz and IFs
from 5 MHz up to 50 MHz. It is optimized for operation in
GSM, DCS1800 and PCS1900 receivers. It consists of a mixer,
an IF amplifier, I and Q demodulators, a phase-locked quadra-
ture oscillator, a precise AGC subsystem, and a biasing system
with external power-down.
The AD6459’s low noise, high intercept mixer is a doubly-
balanced Gilbert-Cell type. It has a nominal –11 dBm input-
referred 1 dB compression point and a 0 dBm input-referred
third-order intercept. The mixer section of the AD6459 also
includes a local oscillator (LO) preamplifier, which lowers the
required LO drive to –16 dBm.
The gain control input accepts an external gain-control voltage
input from an external AGC detector or a DAC. It provides an
80 dB gain range with 27 mV/dB gain scaling.
The I and Q demodulators provide in-phase and quadrature
baseband outputs to interface with Analog Devices’ AD7013
(IS54, TETRA, MSAT) AD7015 and AD6421 (GSM,
DCS1800, PCS1900) baseband converters. An on-board
quadrature VCO that is externally phase-locked to the IF signal
drives the I and Q demodulators. This locked reference signal is
normally provided by an external VCTCXO under the control of
the radio’s digital processor. The AD6459 can also provide
demodulation of N-PSK and N-QAM in many non-TDMA
systems when used with external analog carrier recovery systems
such as the Costas Loop. Finally, the VCO can be phase-locked
to a frequency that is deliberately offset from the IF as in the
case of a Beat-Frequency oscillator (BFO) resulting in the
product detection of CW or SSB.
The AD6459 uses supply voltages from 2.7 V to 5.5 V over the
temperature range of –40°C to +85°C. Operation is enabled by a
CMOS logical level; response time is typically < 80 μs. When
disabled, the standby current is reduced to 2 μA.
The AD6459 comes in a 20-pin shrink small outline (SSOP)
surface mount package.
AD6459–SPECIFICATIONS
NOTESIncluding IF noise and using suggested filter, at VGAIN = 0.2 V.
Specifications subject to change without notice.
(@ TA = +258C, VP = 3.0 V, GREF = 1.2 V, unless otherwise noted)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD6459 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage VPS1, VPS2 to COM1, COM2 . . . . .+5.5 V
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . .600 mW
Operating Temperature Range . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . .–65°C to +150°C
Lead Temperature, Soldering (60 sec) . . . . . . . . . . . .+300°C
NOTES
1Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only, and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended rating conditions for extended periods
may affect device reliability.
2Thermal Characteristics: 20-lead SSOP package: θJA = 126°C/W.
ORDERING GUIDE
PIN DESCRIPTIONS
PIN CONNECTION
20-Pin SSOP (RS-20)
FREF
IRXP
VPS2
FLTR
VPS1
COM1
PRUP
LOIP
QRXN
QRXP
IRXNRFLO
RFHI
COM2
GREF
MXOP
MXOMIFIP
IFIM
GAIN
AD6459
20kΩ
1nF
1nF
1nF
IRXP
MXOP
Figure 1. AD6459 Characterization Board
50Ω
50Ω
Figure 2. Characterization Test Set
RF FREQUENCY – dB50450100
SSB NF – dB
150200250300350400
Figure 3.Mixer Noise Figure vs. RF Frequency
RF FREQUENCY – MHz
RESISTANCE –
CAPACITANCE – pF
Figure 4.Mixer Input Impedance vs. RF Frequency,
VPOS = 2.7 V, TA = +25°C
RF FREQUENCY – MHz
GAIN – dB
150200250300350400
Figure 5.Mixer Conversion Gain vs. RF Frequency,
RF FREQUENCY – MHz
GAIN – dB182226303446
Figure 6.Mixer Conversion Gain vs. IF Frequency,
TA = +25°C, VPOS = 2.7 V, VREF = 1.2 V, FRF = 250 MHz
Figure 7.Mixer Conversion Gain and IF Amplifier/
Demodulator Gain vs. Temperature, VGAIN = 0.2 V,
VREF = 1.2 V , FIF = 26 MHz, FRF = 250 MHz
Figure 8.Mixer Input 1 dB Compression Point vs.
AD6459
INTERMEDIATE FREQUENCY – dB54510152025303540
IF AMP/DEMOD GAIN – dB
Figure 9.IF Amplifier and Demodulator Gain vs.
Frequency, TA = +25°C, VPOS = 2.7 V, VREF = 1.2 V
IF FREQUENCY – MHz
RESISTANCE – 30405060708090
CAPACITANCE – pF
Figure 10.IF Amplifier Input Impedance vs.
Frequency, TA = +25°C, VPOS = 2.7 V, VREF = 1.2 V
GAIN VOLTAGE – Volts
INPUT 1dB COMPRESSION POINT
REFERED TO 50
– dBm
–30
Figure 11.IF Amplifier/Demodulator Input 1 dB
Compression Point vs. VGAIN , FIF = 19.5 MHz,
Figure 12.AD6459 Gain Error vs. Gain Control
Voltage, Representative Part
Figure 13.Demodulator Quadrature Error vs.
FREF Frequency, TA = +25°C, VPOS = 2.7 V
CARRIER FREQUENCY – kHz
PHASE NOISE – dBc
0.110k1101001k
–115
Figure 14.PLL Phase Noise vs. Frequency,
VPOS = 3V, C10 = 1 nF, FREF = 13 MHz

Partno	Mfg	Dc	Qty	Available	Descript
AD6459ARS	AD	N/a	720	avai	GSM 3 V Receiver IF Subsystem
AD6459ARS	ANALOG	N/a	13	avai	GSM 3 V Receiver IF Subsystem