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AD624AD-AD624BD-AD624CD-AD624SD
Precision Instrumentation Amplifier
REV. C
Precision
Instrumentation Amplifier
PRODUCT DESCRIPTION
The AD624 is a high precision, low noise, instrumentation
amplifier designed primarily for use with low level transducers,
including load cells, strain gauges and pressure transducers. An
outstanding combination of low noise, high gain accuracy, low
gain temperature coefficient and high linearity make the AD624
ideal for use in high resolution data acquisition systems.
The AD624C has an input offset voltage drift of less than
0.25mV/°C, output offset voltage drift of less than 10mV/°C,
CMRR above 80dB at unity gain (130dB at G = 500) and a
maximum nonlinearity of 0.001% at G = 1. In addition to these
outstanding dc specifications, the AD624 exhibits superior ac
performance as well. A 25MHz gain bandwidth product, 5V/ms
slew rate and 15ms settling time permit the use of the AD624 in
high speed data acquisition applications.
The AD624 does not need any external components for pre-
trimmed gains of 1, 100, 200, 500 and 1000. Additional gains
such as 250 and 333 can be programmed within one percent
accuracy with external jumpers. A single external resistor can
also be used to set the 624’s gain to any value in the range of 1
to 10,000.
PRODUCT HIGHLIGHTSThe AD624 offers outstanding noise performance. Input
noise is typically less than 4nV/√Hz at 1 kHz.The AD624 is a functionally complete instrumentation am-
plifier. Pin programmable gains of 1, 100, 200, 500 and 1000
are provided on the chip. Other gains are achieved through
the use of a single external resistor.The offset voltage, offset voltage drift, gain accuracy and gain
temperature coefficients are guaranteed for all pretrimmed
gains.The AD624 provides totally independent input and output
offset nulling terminals for high precision applications.
This minimizes the effect of offset voltage in gain ranging
applications.A sense terminal is provided to enable the user to minimize
the errors induced through long leads. A reference terminal is
also provided to permit level shifting at the output.
FEATURES
Low Noise: 0.2mV p-p 0.1 Hz to 10 Hz
Low Gain TC:5 ppm max (G = 1)
Low Nonlinearity:0.001% max (G = 1 to 200)
High CMRR:130 dB min (G = 500 to 1000)
Low Input Offset Voltage:25mV, max
Low Input Offset Voltage Drift:0.25mV/8C max
Gain Bandwidth Product:25 MHz
Pin Programmable Gains of 1, 100, 200, 500, 1000
No External Components Required
Internally Compensated
FUNCTIONAL BLOCK DIAGRAM
–INPUT
G = 100
G = 200
G = 500
RG1
RG2
+INPUT
SENSE
OUTPUT
REF
AD624–SPECIFICATIONS
(@ VS = 615V, RL = 2kV and TA = +258C, unless otherwise noted)
AD624
POWER SUPPLY
NOTESVDL is the maximum differential input voltage at G = 1 for specified nonlinearity, VDL at other gains = 10 V/G. VD = actual differential input voltage.Example: G = 10, VD = 0.50. VCM = 12 V – (10/2 · 0.50 V) = 9.5 V.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production unit at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . 420 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . –VS
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
AD624A/B/C . . . . . . . . . . . . . . . . . . . . . . . –25°C to +85°C
AD624S . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature (Soldering, 60 secs) . . . . . . . . . . . . +300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
CONNECTION DIAGRAM
METALIZATION PHOTOGRAPH
Contact factory for latest dimensions
Dimensions shown in inches and (mm).ORDERING GUIDE
*See Analog Devices’ military data sheet for 883B specifications.
AD624–Typical Characteristics02010
SUPPLY VOLTAGE – 6V
INPUT VOLTAGE RANGE –
Figure 1.Input Voltage Range vs.
Supply Voltage, G = 1
SUPPLY VOLTAGE – 6V
AMPLIFIER QUIESCENT CURRENT – mA
Figure 4.Quiescent Current vs.
Supply Voltage20010
INPUT VOLTAGE – 6V
INPUT BIAS CURRENT –
Figure 7.Input Bias Current vs. CMV2010
SUPPLY VOLTAGE – 6V
OUTPUT VOLTAGE SWING –
Figure 2.Output Voltage Swing vs.
Supply Voltage20010
SUPPLY VOLTAGE – 6V
INPUT BIAS CURRENT –
Figure 5.Input Bias Current vs.
Supply Voltage
WARM-UP TIME – Minutes
VOS FROM FINAL VALUE –
Figure 8.Offset Voltage, RTI, Turn
On Drift10010k1k
LOAD RESISTANCE – V
OUTPUT VOLTAGE SWING – V p-p
Figure 3.Output Voltage Swing vs.
Load Resistance
TEMPERATURE – 8C
INPUT BIAS CURRENT – nA
–125
Figure 6.Input Bias Current vs.
Temperature
Figure 9.Gain vs. Frequency
11010M1M100k10k1k100FREQUENCY – Hz
CMRR – dB
–20
Figure 10.CMRR vs. Frequency RTI,
Zero to 1k Source Imbalance
100k
10k1k100
FREQUENCY – Hz
POWER SUPPLY REJECTION – dB
Figure 13.Negative PSRR vs.
Frequency
Figure 16.Low Frequency Voltage
Noise, G = 1 (System Gain = 1000)
FULL-POWER RESPONSE – V p-p
FREQUENCY – Hz
10k1k100k1M
Figure 11.Large Signal Frequency
Response
VOLT NSD – nV/
100k10110k1k100
FREQUENCY – Hz
Figure 14.RTI Noise Spectral
Density vs. Gain
Figure 17.Low Frequency Voltage
Noise, G = 1000 (System Gain =
100,000)
160100k
10k1k100
FREQUENCY – Hz
POWER SUPPLY REJECTION – dB
Figure 12.Positive PSRR vs.
Frequency
10k
100k
100k10.110k10010
FREQUENCY – Hz
CURRENT NOISE SPECTRAL DENSITY – fA/
Figure 15.Input Current Noise
8 TO –8
12 TO –12
OUTPUT
STEP –V
4 TO –4
–4 TO 4
–8 TO 8
–12 TO 12105
SETTLING TIME – ms0.1%0.01%
0.1%0.01%
Figure 18.Settling Time, Gain = 1
AD624
Figure 19.Large Signal Pulse
Response and Settling Time, G = 1
Figure 22.Range Signal Pulse
Response and Settling Time,
G = 500
8 TO –8
12 TO –12
OUTPUT
STEP –V
4 TO –4
–4 TO 4
–8 TO 8
–12 TO 12105
SETTLING TIME – ms
0.01%
0.01%
Figure 20.Settling Time Gain = 100
8 TO –8
12 TO –12
OUTPUT
STEP –V
4 TO –4
–4 TO 4
–8 TO 8
–12 TO 12105
SETTLING TIME – ms
Figure 23.Settling Time Gain = 1000
Figure 21.Large Signal Pulse
Response and Settling Time,
G = 100
Figure 24.Large Signal Pulse
Response and Settling Time,
G = 1000
10kV
1kV
10T
10kV
–VS
INPUT
20V p-p
Figure 25. Settling Time Test Circuit
THEORY OF OPERATION
The AD624 is a monolithic instrumentation amplifier based on
a modification of the classic three-op-amp instrumentation
amplifier. Monolithic construction and laser-wafer-trimming
allow the tight matching and tracking of circuit components and
the high level of performance that this circuit architecture is ca-
pable of.
A preamp section (Q1–Q4) develops the programmed gain by
the use of feedback concepts. Feedback from the outputs of A1
and A2 forces the collector currents of Q1–Q4 to be constant
thereby impressing the input voltage across RG.
The gain is set by choosing the value of RG from the equation,
Gain =
ance of the input preamp stage increasing it asymptotically to
the transconductance of the input transistors as RG is reduced
for larger gains. This has three important advantages. First, this
approach allows the circuit to achieve a very high open loop gain
of 3 · 108 at a programmed gain of 1000 thus reducing gain
related errors to a negligible 3 ppm. Second, the gain bandwidth
product which is determined by C3 or C4 and the input trans-
conductance, reaches 25MHz. Third, the input voltage noise
reduces to a value determined by the collector current of the
input transistors for an RTI noise of 4 nV/√Hz at G ‡ 500.
+VS
Figure 26.Noise Test Circuit
INPUT CONSIDERATIONS
Under input overload conditions the user will see RG + 100W
and two diode drops (~1.2V) between the plus and minus
inputs, in either direction. If safe overload current under all
conditions is assumed to be 10mA, the maximum overload
The AD524 should be considered in applications that require
protection from severe input overload. If this is not possible,
external protection resistors can be put in series with the inputs
of the AD624 to augment the internal (50W) protection resis-
tors. This will most seriously degrade the noise performance.
For this reason the value of these resistors should be chosen to
be as low as possible and still provide 10mA of current limiting
under maximum continuous overload conditions. In selecting
the value of these resistors, the internal gain setting resistor and
the 1.2 volt drop need to be considered. For example, to pro-
tect the device from a continuous differential overload of 20V
at a gain of 100, 1.9kW of resistance is required. The internal
gain resistor is 404W; the internal protect resistor is 100W.
There is a 1.2V drop across D1 or D2 and the base-emitter
junction of either Q1 and Q3 or Q2 and Q4 as shown in Figure
27, 1400W of external resistance would be required (700W in
series with each input). The RTI noise in this case would be
50mA
SENSE
+IN
REF
–IN
–VS
+VS
Figure 27.Simplified Circuit of Amplifier; Gain Is Defined
as (R56 + R57)/(RG) + 1. For a Gain of 1, RG Is an Open
Circuit.
INPUT OFFSET AND OUTPUT OFFSET
Voltage offset specifications are often considered a figure of
merit for instrumentation amplifiers. While initial offset may
be adjusted to zero, shifts in offset voltage due to temperature
variations will cause errors. Intelligent systems can often correct
AD624
directly proportional to gain i.e., input offset as measured at
the␣output at G = 100 is 100 times greater than at G = 1.
Output␣offset is independent of gain. At low gains, output offset
drift is␣dominant, while at high gains input offset drift domi-
nates.␣Therefore, the output offset voltage drift is normally
specified␣as drift at G = 1 (where input effects are insignificant),
while␣input offset voltage drift is given by drift specification at a
high␣gain (where output offset effects are negligible). All input-
related␣numbers are referred to the input (RTI) which is to say
that the␣effect on the output is “G” times larger. Voltage offset
vs. power␣supply is also specified at one or more gain settings
and is also␣RTI.
By separating these errors, one can evaluate the total error inde-
pendent of the gain setting used. In a given gain configura-
tion␣both errors can be combined to give a total error referred to
the␣input (R.T.I.) or output (R.T.O.) by the following formula:
Total Error R.T.I. = input error + (output error/gain)
Total Error R.T.O. = (Gain · input error) + output error
As an illustration, a typical AD624 might have a +250mV out-
put␣offset and a –50mV input offset. In a unity gain configura-
tion,␣the total output offset would be 200mV or the sum of the
two.␣At a gain of 100, the output offset would be –4.75mV
or:␣+250mV + 100 (–50mV) = –4.75mV.␣
The AD624 provides for both input and output offset adjust-
ment.␣This optimizes nulling in very high precision applications
and␣minimizes offset voltage effects in switched gain applica-
tions. In␣such applications the input offset is adjusted first at the
highest␣programmed gain, then the output offset is adjusted at
G = 1.
GAIN
The AD624 includes high accuracy pretrimmed internal
gain␣resistors. These allow for single connection program-
ming of␣gains of 1, 100, 200 and 500. Additionally, a variety
of gains␣including a pretrimmed gain of 1000 can be achieved
through␣series and parallel combinations of the internal resis-
tors. Table I␣shows the available gains and the appropriate
pin connections␣and gain temperature coefficients.
The gain values achieved via the combination of internal
resistors␣are extremely useful. The temperature coefficient of the
gain is␣dependent primarily on the mismatch of the temperature
coefficients of the various internal resistors. Tracking of these
resistors␣is extremely tight resulting in the low gain TCs shown
in␣Table I.
If the desired value of gain is not attainable using the inter-
nal␣resistors, a single external resistor can be used to achieve
any␣gain between 1 and 10,000. This resistor connected between
G = 100
RG2
–VS
OUTPUT
SIGNAL
COMMON
VOUT–INPUT
RG1
G = 200
G = 500
+INPUT
INPUT
+VS
Table I.
Pins 3 and 16 programs the gain according to the formula
(see Figure 29). For best results RG should be a precision resis-
tor with a low temperature coefficient. An external RG affects both
gain accuracy and gain drift due to the mismatch between it and
the internal thin-film resistors R56 and R57. Gain accuracy is
determined by the tolerance of the external RG and the absolute
accuracy of the internal resistors (–20%). Gain drift is determined
by the mismatch of the temperature coefficient of RG and the tem-
perature coefficient of the internal resistors (–15ppm/°C typ),
and the temperature coefficient of the internal interconnections.
RG2
–VS
REFERENCE
VOUT
–INPUT
RG1
2.105kV
+INPUT
G = + 1 = 20 620%40.000
2.105
Figure 29.Operating Connections for G = 20
The AD624 may also be configured to provide gain in the out-
put stage. Figure 30 shows an H pad attenuator connected to
the reference and sense lines of the AD624. The values of R1,
R2 and R3 should be selected to be as low as possible to mini-
mize the gain variation and reduction of CMRR. Varying R2
will precisely set the gain without affecting CMRR. CMRR is
determined by the match of R1 and R3.
G = 100
RG2
VOUT
–INPUT
RG1
G = 200
G = 500
+INPUT
+VS
6kV

Partno	Mfg	Dc	Qty	Available	Descript
AD624AD	AD	N/a	300	avai	Precision Instrumentation Amplifier
AD624BD	AD	N/a	44	avai	Precision Instrumentation Amplifier
AD624CD		N/a	14	avai	Precision Instrumentation Amplifier
AD624SD	AD	N/a	9	avai	Precision Instrumentation Amplifier
AD624SD	ADI	N/a	876	avai	Precision Instrumentation Amplifier