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AD621ADN/a40avaiLow Drift, Low Power Instrumentation Amp with fixed gains of 10 and 100


AD621 ,Low Drift, Low Power Instrumentation Amp with fixed gains of 10 and 100Specifications subject to change without notice.–2– REV. BAD621(Typical @ 25C, V = 15 V, and R = ..
AD621AN ,Low Drift, Low Power Instrumentation Amplifierspecifications.2This is defined as the supply range over which PSRR is defined.3Input Voltage Range ..
AD621AR ,Low Drift, Low Power Instrumentation AmplifierSPECIFICATIONS(typical @ +258C, V = 615 V, and R = 2 kV, unless otherwise noted)Gain = 10 S L1AD621 ..
AD621AR ,Low Drift, Low Power Instrumentation AmplifierspecificationsWeigh Scalesincluding nonlinearity of 10 ppm, gain drift of 5 ppm/°C, 50 μVTransducer ..
AD621ARZ ,Low Drift, Low Power Instrumentation Amp with fixed gains of 10 and 100Specifications subject to change without notice.–2– REV. BAD621(Typical @ 25C, V = 15 V, and R = ..
AD621ARZ ,Low Drift, Low Power Instrumentation Amp with fixed gains of 10 and 100SPECIFICATIONS(Typical @ 25C, V = 15 V, and R = 2 k, unless otherwise noted.)Gain = 10 S L1AD621 ..
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AD621
Low Drift, Low Power Instrumentation Amp with fixed gains of 10 and 100
CONNECTION DIAGRAM
8-Lead Plastic Mini-DIP (N), Cerdip (Q)
and SOIC (R) Packages

REV.BLow Drift, Low Power
Instrumentation Amplifier
FEATURES
EASY TO USE
Pin-Strappable Gains of 10 and 100
All Errors Specified for Total System Performance
Higher Performance than Discrete In Amp Designs
Available in 8-Lead DIP and SOIC
Low Power, 1.3 mA Max Supply Current
Wide Power Supply Range (�2.3 V to �18 V)
EXCELLENT DC PERFORMANCE
0.15% Max, Total Gain Error

�5 ppm/�C, Total Gain Drift
125 �V Max, Total Offset Voltage
1.0 �V/�C Max, Offset Voltage Drift
LOW NOISE
9 nV/√Hz, @ 1 kHz, Input Voltage Noise
0.28 �V p-p Noise (0.1 Hz to 10 Hz)
EXCELLENT AC SPECIFICATIONS
800 kHz Bandwidth (G = 10), 200 kHz (G = 100)
12 �s Settling Time to 0.01%
APPLICATIONS
Weigh Scales
Transducer Interface and Data Acquisition Systems
Industrial Process Controls
Battery-Powered and Portable Equipment
PRODUCT DESCRIPTION

The AD621 is an easy to use, low cost, low power, high accu-
racy instrumentation amplifier that is ideally suited for a wide
range of applications. Its unique combination of high perfor-
mance, small size and low power, outperforms discrete in amp
implementations. High functionality, low gain errors, and low
Figure 1.Three Op Amp IA Designs vs. AD621
gain drift errors are achieved by the use of internal gain setting
resistors. Fixed gains of 10 and 100 can easily be set via external
pin strapping. The AD621 is fully specified as a total system,
therefore, simplifying the design process.
For portable or remote applications, where power dissipation,
size, and weight are critical, the AD621 features a very low
supply current of 1.3 mA max and is packaged in a compact
8-lead SOIC, 8-lead plastic DIP or 8-lead cerdip. The AD621
also excels in applications requiring high total accuracy, such
as precision data acquisition systems used in weigh scales and
transducer interface circuits. Low maximum error specifications
including nonlinearity of 10 ppm, gain drift of 5 ppm/°C, 50 µV
offset voltage, and 0.6 µV/°C offset drift (“B” grade), make
possible total system performance at a lower cost than has been
previously achieved with discrete designs or with other mono-
lithic instrumentation amplifiers.
When operating from high source impedances, as in ECG and
blood pressure monitors, the AD621 features the ideal combina-
tion of low noise and low input bias currents. Voltage noise is
specified as 9 nV/√Hz at 1 kHz and 0.28 µV p-p from 0.1 Hz to
10 Hz. Input current noise is also extremely low at 0.1 pA/√Hz.
The AD621 outperforms FET input devices with an input bias
current specification of 1.5 nA max over the full industrial tem-
perature range.
Figure 2.Total Voltage Noise vs. Source Resistance
AD621–SPECIFICATIONS
Gain = 10

Total NOISE
OUTPUT
NOTESSee Analog Devices’ military data sheet for 883B tested specifications.This is defined as the supply range over which PSRR is defined.Input Voltage Range = CMV + (Gain × VDIFF).
Specifications subject to change without notice.
(Typical @ 25�C, VS = �15V, and RL = 2 k�, unless otherwise noted.)
NOTESSee Analog Devices’ military data sheet for 883B tested specifications.This is defined as the supply range over which PSEE is defined.Input Voltage Range = CMV + (Gain × VDIFF).
Specifications subject to change without notice.
Gain = 100(Typical @ 25�C, VS = �15V, and RL = 2 k�, unless otherwise noted.)
AD621
AD621
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.Specification is for device in free air:
8-Lead Plastic Package: θJA = 95°C/W
8-Lead Cerdip Package: θJA = 110°C/W
8-Lead SOIC Package: θJA = 155°C/W
ABSOLUTE MAXIMUM RATINGS1

SupplyVoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18V
InternalPowerDissipation2 . . . . . . . . . . . . . . . . . . . . 650 mW
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ±VS
DifferentialInputVoltage . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Short Circuit Duration .. . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (Q) . . . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Operating Temperature Range
AD621 (A, B) . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD621 (S) . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range
(Soldering10seconds) . . . . . . . . . . . . . . . . . . . . . . . . 300°C
ESD SUSCEPTIBILITY

ESD (electrostatic discharge) sensitive device. Electrostatic
charges as high as 4000 volts, which readily accumulate on the
human body and on test equipment, can discharge without
detection. Although the AD621 features proprietary ESD pro-
tection circuitry, permanent damage may still occur on these
devices if they are subjected to high energy electrostatic dis-
charges. Therefore, proper ESD precautions are recommended
to avoid any performance degradation or loss of functionality.
ORDERING GUIDE

NOTESN = Plastic DIP; Q = Cerdip; R = SOIC.See Analog Devices’ military data sheet for 883B specifications.
METALIZATION PHOTOGRAPH

Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
Typical Performance Characteristics–AD621
TPC 1.Typical Distribution of VOS, Gain = 10
TPC 2.Typical Distribution of VOS, Gain = 100
TPC 3.Typical Distribution of Input Offset Current
TPC 4.Typical Distribution of Input Bias Current
TPC 5.Change in Input Offset Voltage vs. Warm-Up Time
TPC 6.Voltage Noise Spectral Density
AD621
TPC 7.Current Noise Spectral Density vs. Frequency
TPC 8a.0.1 Hz to 10 Hz RTI Voltage Noise, Gain = 10
TPC 8b.0.1 Hz to 10 Hz RTI Voltage Noise, G = 100
TPC 9.0.1 Hz to 10 Hz Current Noise, 5 pA per Vertical
Div, 1 Second per Horizontal Div
TPC 10.Total Drift vs. Source Resistance
TPC 11.CMR vs. Frequency, RTI, for a Zero to 1 kΩ
Source Imbalance
TPC 12.Positive PSR vs. Frequency
TPC 13.Negative PSR vs. Frequency
TPC 14.Closed-Loop Gain vs. Frequency
TPC 15.Large Signal Frequency Response
TPC 16.Input Voltage Range vs. Supply Voltage
TPC 17.Output Voltage Swing vs. Supply Voltage,
G = 10
AD621
TPC 18.Output Voltage Swing vs. Resistive Load
TPC 19.Large Signal Pulse Response and Settling
Time Gain, G = 10 (0.5 mV = 0.01%), RL = 1 kΩ,
CL = 100 pF
TPC 21.Large Signal Pulse Response and Settling
Time, G = 100 (0.5 mV = 0.1%), RL = 2 kΩ, CL = 100 pF
TPC 22.Small Signal Pulse Response, G = 100,
RL = 2 kΩ, CL = 100 pF
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