AD608AR Fast Delivery |IC PHOENIX CO.,LIMITED

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AD608AR
Low Power Mixer/Limiter/RSSI 3 V Receiver IF Subsystem
Low Power Mixer/Limiter/RSSI3 V Receiver IF Subsystem
FEATURES
Mixer
–15 dBm 1 dB Compression Point
–5 dBm IP3
24 dB Conversion Gain
>500 MHz Input Bandwidth
Logarithmic/Limiting Amplifier
80 dB RSSI Range
638 Phase Stability over 80 dB Range
Low Power
21 mW at 3 V Power Consumption
CMOS-Compatible Power-Down to 300 mW typ
200 ns Enable/Disable Time
APPLICATIONS
PHS, GSM, TDMA, FM, or PM Receivers
Battery-Powered Instrumentation
Base Station RSSI Measurement
The RF and LO bandwidths both exceed 500 MHz. In a typical
IF application, the AD608 will accept the output of a 240 MHz
SAW filter and downconvert it to a nominal 10.7 MHz IF with
a conversion gain of 24 dB (ZIF = 165 Ω). The AD608’s loga-
rithmic/limiting amplifier section handles any IF from LF to as
high as 30 MHz.
The mixer is a doubly-balanced “Gilbert-Cell” type and oper-
ates linearly for RF inputs spanning –95 dBm to –15 dBm. It
has a nominal –5 dBm third-order intercept. An onboard LO
preamplifier requires only –16 dBm of LO drive. The mixer’s
current output drives a reverse-terminated, industry-standard
10.7 MHz 330 Ω filter.
The nominal logarithmic scaling is such that the output is
+0.2 V for a sinusoidal input to the IF amplifier of –75 dBm
and +1.8 V at an input of +5 dBm; over this range the logarith-
mic conformance is typically ±1 dB. The logarithmic slope is
proportional to the supply voltage. A feedback loop automati-
cally nulls the input offset of the first stage down to the sub-
microvolt level.
The AD608’s limiter output provides a hard-limited signal out-
put at 400 mV p-p. The voltage gain of the limiting amplifier to
this output is more than 100 dB. Transition times are 11 ns and
the phase is stable to within ±3° at 10.7 MHz for signals from
–75 dBm to +5 dBm.
The AD608 is enabled by a CMOS logic-level voltage input,
with a response time of 200 ns. When disabled, the standby
power is reduced to 300 μW within 400 ns.
The AD608 is specified for the industrial temperature range of
–25°C to +85°C for 2.7 V to 5.5 V supplies and –40°C to +85°C
for 4.5 V to 5.5 V supplies. It comes in a 16-pin plastic SOIC.
GENERAL DESCRIPTION
The AD608 provides both a low power, low distortion, low
noise mixer and a complete, monolithic logarithmic/limiting
amplifier using a “successive-detection” technique. It provides
both a high speed RSSI (Received Signal Strength Indicator)
output with 80 dB dynamic range and a hard-limited output.
The RSSI output is from a two-pole post-demodulation low-
pass filter and provides a loadable output voltage of +0.2 V to
+1.8 V. The AD608 operates from a single 2.7 V to 5.5 V sup-
ply at a typical power level of 21 mW at 3 V.
FUNCTIONAL BLOCK DIAGRAMLO
PREAMP
AD608
RFHI
RFLO
IF INPUT
–75dBm TO
+15dBm2
FDBK
FINAL
LIMITER
±50µA416
LOHI
+2.7V TO 5.5V
+2.7V TO
5.5V
LO INPUT
–16dBm
CMOS LOGIC
INPUT
±6mA MAX OUTPUT
(±890mV INTO 165Ω)
18nF
1 –15dBm = ±56mV MAX FOR LINEAR OPERATION3
2 39.76µV RMS TO 397.6mV RMS FOR ±1dB RSSI
ACCURACY
NOTES:
REV.B
AD608–SPECIFICATIONS
LIMITER PERFORMANCE
POWER-DOWN INTERFACE
OPERATING TEMPERATURE
Specifications subject to change without notice.
(@ TA = + 258C, Supply = 3 V, dBm is referred to 50 V, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage VPS1, VPS2 . . . . . . . . . . . . . . . . . . . . . .+6 V
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . .600 mW
Temperature Range . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering 60 sec) . . . . . . . . . . . . .+300°C
NOTESStresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only, and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended rating conditions for extended periods
may affect device reliability.Thermal Characteristics:
16-Pin SOIC Package: θJA = 110°C/W.
ORDERING GUIDE
*R = Small Outline IC (SOIC).
PIN DESCRIPTIONS
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD608 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
AD608
RF FREQUENCY – MHz
CONVERSION GAIN – dB
22.5
Figure 3.Mixer Conversion Gain vs.
Frequency
PRUP IN
VPOS
51.1Ω
0.1µF
54.9ΩRSSI OUTPUT
LMOP OUT
TRIGGER
U1 – 74HC00
Figure 1.IF Test Board Schematic
INPUT POWER – dBm
RSSI – V
0.5
Figure 6.IF RSSI Output vs.
IF FREQUENCY – MHz
RESPONSE – dB
01080203040506070
Figure 4.Mixer IF Port Bandwidth
Figure 5.IF RSSI Output vs. Supply
Voltage (Ambient Temperature)
IF TEST BOARD
10.7 MHz
FLUKE 6082A
SYNTHESIZER3V
HP3366A
Figure 7. Test Circuit for IF RSSI Out-
put vs. Supply Voltage (Ambient Tem-
perature) (Figure 5) and IF RSSI
Output vs. Temperature (3 V Supply)
(Figure 6) and RSSI Error vs. Input
Figure 2.Mixer Test Board Schematic
INPUT POWER – dBm
RSSI ERROR – dB
1.0
Figure 8.RSSI Error vs. Input Power
10.7 MHz
0dBm
Figure 10.
(Figure 9)
RSSI
Figure 11. RSSI Pulse Response/RSSI Rise Time
10.7 MHz
FLUKE 6082A
SYNTHESIZER3V
HP3366A
HP54120A
DIGITAL
OSCILLOSCOPE
0dBm
Figure 12. Test Circuit for RSSI Pulse Response/RSSI Rise
Time (Figure 11)
Figure 14. Test Circuit for Limiter Rise and Fall Times
(Figure 13)
Figure 15. Limiter Power-Up Response Time
Figure 16. Test Circuit for Limiter Power-Up Response
Time (Figure 15)
AD608
INPUT POWER – dBm–80–7010–60–50–40–20–100–30
RELATIVE PHASE – Degrees
Figure 17. Limiter Phase Performance vs.
Input Power at IFHI
IF TEST BOARD
10.7 MHz
FLUKE 6082A
SYNTHESIZER
TEK P6201
HP54120A
DIGITAL
OSCILLOSCOPE
MCL
ZDC-20-1
TOKO SK107MK1-A0-10
Figure 18. Test Circuit for Limiter Phase Performance vs.
Input Power at IFHI (Figure 17) and Limiter Jitter Perfor-
mance vs. Input Power at IFHI (Figure 19)
INPUT POWER AT IFHI – dBm–80–7010–60–50–40–20–100–30
RMS JITTER – Degrees
Figure 19. Limiter Jitter Performance vs.
Input Power at IFHI

Partno	Mfg	Dc	Qty	Available	Descript
AD608AR		N/a	11180	avai	Low Power Mixer/Limiter/RSSI 3 V Receiver IF Subsystem