AD607ARS Fast Delivery |IC PHOENIX CO.,LIMITED

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AD607ARS
Low Power Mixer/AGC/RSSI 3 V Receiver IF Subsystem
REV.0Low Power Mixer/AGC/RSSI
3 V Receiver IF Subsystem
FEATURES
Complete Receiver on a Chip: Monoceiver™ Mixer
–15 dBm 1 dB Compression Point
–8 dBm Input Third Order Intercept
500 MHz RF and LO Bandwidths
Linear IF Amplifier
Linear-in-dB Gain Control
MGC or AGC with RSSI Output
Quadrature Demodulator
On-Board Phase-Locked Quadrature Oscillator
Demodulates IFs from 400 kHz to 12 MHz
Can Also Demodulate AM, CW, SSB
Low Power
25 mW at 3 V
CMOS Compatible Power-Down
Interfaces to AD7013 and AD7015 Baseband Converters
APPLICATIONS
GSM, CDMA, TDMA, and TETRA Receivers
Satellite Terminals
Battery-Powered Communications Receivers
PIN CONFIGURATION
20-Lead SSOP
(RS Suffix)
GENERAL DESCRIPTION
The AD607 is a 3 V low power receiver IF subsystem for opera-
tion at input frequencies as high as 500 MHz and IFs from
400 kHz to 12 MHz. It consists of a mixer, IF amplifiers, I and
Q demodulators, a phase-locked quadrature oscillator, AGC
detector, and a biasing system with external power-down.
The AD607’s low noise, high intercept mixer is a doubly-
balanced Gilbert cell type. It has a nominal –15 dBm input
referred 1 dB compression point and a –8 dBm input referred
third-order intercept. The mixer section of the AD607 also
includes a local oscillator (LO) preamplifier, which lowers the
required LO drive to –16 dBm.
The gain control input can serve as either a manual gain control
(MGC) input or an automatic gain control (AGC) voltage-
based RSSI output. In MGC operation, the AD607 accepts an
external gain-control voltage input from an external AGC detec-
tor or a DAC. In AGC operation, an onboard detector and an
external averaging capacitor form an AGC loop that holds the
IF output level at ±300 mV. The voltage across this capacitor
then provides an RSSI output.
The I and Q demodulators provide inphase and quadrature
baseband outputs to interface with Analog Devices’ AD7013
(IS54, TETRA, MSAT) and AD7015 (GSM) baseband con-
verters. A quadrature VCO phase-locked to the IF drives the I
and Q demodulators. The I and Q demodulators can also de-
modulate AM; when the AD607’s quadrature VCO is phase
locked to the received signal, the in-phase demodulator becomes
a synchronous product detector for AM. The VCO can also be
phase-locked to an external beat-frequency oscillator (BFO),
and the demodulator serves as a product detector for CW or
SSB reception. Finally, the AD607 can be used to demodulate
BPSK using an external Costas Loop for carrier recovery.
AD607–SPECIFICATIONS
(@ TA = + 25°C, Supply = 3.0 V, IF = 10.7 MHz, unless otherwise noted)
ORDERING GUIDE
ABSOLUTE MAXIMUM RATINGS1
SupplyVoltage VPS1, VPS2 to COM1, COM2 . . . . . . .+5.5V
InternalPowerDissipation2 . . . . . . . . . . . . . . . . . . . .600 mW
2.7V to 5.5VOperatingTemperatureRange
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–25°Cto+85°C
4.5V to 5.5V Operating Temperature Range
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering60sec) . . . . . . . .+300°C
NOTESStresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.Thermal Characteristics: 20-lead SSOP Package: θJA = 126°C/W.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD607 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
AD607
PIN DESCRIPTION
PIN CONNECTION
20-Pin SSOP (RS-20)
FDIN
QOUT
IOUT
FLTR
VPS1
COM1
PRUP
LOIP
IFOP
DMIP
VPS2RFLO
RFHI
GREF
MXOP
VMID
IFHIIFLO
GAIN/RS
COM2
IEEERF_OUT
SNEG
VREF
50Ω
GAIN
HP8764B
50Ω
50Ω
HP8594E
RF_INIEEE
SPECAN0CS1V
1kΩ
HP8765B0S1V
FET
IN2OUT2
PROBE SUPPLY
Figure 1.Mixer/Amplifier Test Set
CHARACTERIZATION
BOARD
Figure 2.Mixer Noise Figure Test Set
AD607
CHARACTERIZATION
BOARD
Figure 3.IF Amp Noise Figure Test Set
CHARACTERIZATION
BOARD
HP54120
Figure 4.PLL/Demodulator Test Set
GPIBDMM
GAIN
Figure 5.GAIN Pin Bias Test Set
Figure 6.Demodulator Bias Test Set
CHARACTERIZATION
BOARD
AD607
CHARACTERIZATION
BOARD
QOUT
BIAS
VPOS
PRUP
GAIN
HP8594E
RF_INIEEE
SPEC ANOUT1OUT2
HP6633A
IEEE
VPOS
VNEG
SPOS
SNEGDCPS
HP8656BIEEE
SYNTHESIZER
Figure 9.IF Output Impedance Test Set
HP54120
CHARACTERIZATION
BOARD
PRUP
GAIN
IEEE
IEEE
SPOS
SNEGVREF
Figure 11.Quadrature Accuracy Test Set
IOUT
*
QOUT
*
IFOP
*
GAIN
*
DMIP
*
0.1µF
0.1µF
VPOS
GND
FDIN
PRUP
LOIP
RFHI
MXOP
IFHI
NOTE: CONNECTIONS MARKED * ARE DC COUPLED.
Figure 12.AD607 Characterization Board
AD607
RF FREQUENCY – MHz
SSB NF – dB7090110130150
Figure 13.
RESISTANCE –
Figure 14.
VPOS = 3 V, V GAIN = 0.8 V
RADIO FREQUENCY – MHz
CONVERSION GAIN – dB2.4
SUPPLY – Volts
2.83.23.63.844.24.44.655.25.45.65.82.633.4
INTERMEDIATE FREQUENCY – MHz
110
Figure 19.IF Amplifier Gain vs. Frequency,
T = +25°C, VPOS = 3 V, VREF = 1.5 V0
GAIN VOLTAGE – Volts
ERROR – dB
0.20.40.60.81.21.41.61.82.22.42.62.8
Figure 20.AD607 Gain Error vs. Gain Control Voltage,
Representative Part
996.200 µs1.00870 ms1.02120 ms
Timebase= 2.5 µs/divDelay= 1.00870 ms
Memory 1= 100.0 mVolts/divOffset= 127.3 mVolts
Timebase= 2.50 µs/divDelay= 1.00870 ms
Memory 2= 20.00 mVolts/divOffset= 155.2 mVolts
Timebase= 2.50 µs/divDelay= 1.00870 ms
Delta T= 16.5199 µs
Start= 1.00048 msStop= 1.01700 ms
Trigger on External at Pos. Edge at 134.0 mVolts
1.00E+071.00E+02
CARRIER FREQUENCY OFFSET, f(fm) – Hz
1.00E+031.00E+05
1.00E+041.00E+06
Figure 22.PLL Phase Noise L (F) vs. Frequency,
VPOS = 3 V, C3 = 0.1 μF, IF = 10.7 MHz
Figure 23.PLL Loop Voltage at FLTR (KVCO) vs. Frequency85
QUADRATURE ANGLE – Degrees86878889909293
COUNT
Figure 24.Demodulator Quadrature Angle, Histogram,
AD607
COUNT
Figure 25.
T = +25°C, VPOS = 3 V, IF = 10.7 MHz
IGAIN – dB
Figure 26.
TEMPERATURE – °C
IGAIN – dB708090100110120130
Figure 27.Demodulator Gain vs. Temperature
OUTPUT OFFSET – Volts
COUNT
0.02
Figure 30.Demodulator Output Offset Voltage

Partno	Mfg	Dc	Qty	Available	Descript
AD607ARS	ADI	N/a	1000	avai	Low Power Mixer/AGC/RSSI 3 V Receiver IF Subsystem