AD588AQ ,High Precision Voltage ReferenceSPECIFICATIONS S AD588SQ AD588JQ/AQ/TQ AD588KQ/BQMin Typ Max Min Typ Max Min Typ Max Un ..
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AD588JQ ,High Precision Voltage ReferenceSpecifications tested using +10 V configuration unless otherwise indicated.2Gain and balance adjust ..
AD588KQ ,High Precision Voltage Referencespecifications are guaranteed, although only those2Temperature coefficient specified from 0°C to +7 ..
AD588SQ ,High Precision Voltage Referencespecifications are guaranteed, although only those2Temperature coefficient specified from 0°C to +7 ..
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AD9846A ,Complete 10-Bit 30 MSPS CCD Signal ProcessorSPECIFICATIONSMIN MAX DATACLK SHP SHDParameter Min Typ Max Unit NotePOWER CONSUMPTION 117 mW See TP ..
AD9846AJST ,Complete 10-Bit 30 MSPS CCD Signal ProcessorSPECIFICATIONSMIN MAX DATACLK SHP SHDParameter Min Typ Max Unit NotePOWER CONSUMPTION 117 mW See TP ..
AD588AQ-AD588BQ-AD588JQ-AD588KQ-AD588SQ
High Precision Voltage Reference
REV.B
FEATURES
Low Drift: 1.5 ppm/8C
Low Initial Error: 1 mV
Pin-Programmable Output
+10 V, +5 V, 65 V Tracking, –5 V, –10 V
Flexible Output Force and Sense Terminals
High Impedance Ground Sense
Machine-lnsertable DIP Packaging
MIL-STD-883 Compliant Versions Available
PRODUCT DESCRIPTIONThe AD588 represents a major advance in the state-of-the-art in
monolithic voltage references. Low initial error and low tem-
perature drift give the AD588 absolute accuracy performance
previously not available in monolithic form. The AD588 uses a
proprietary ion-implanted buried Zener diode, and laser-wafer-
drift trimming of high stability thin-film resistors to provide out-
standing performance at low cost.
The AD588 includes the basic reference cell and three addi-
tional amplifiers which provide pin-programmable output
ranges. The amplifiers are laser-trimmed for low offset and low
drift to maintain the accuracy of the reference. The amplifiers
are configured to allow Kelvin connections to the load and/or
boosters for driving long lines or high-current loads, delivering
the full accuracy of the AD588 where it is required in the appli-
cation circuit.
The low initial error allows the AD588 to be used as a system
reference in precision measurement applications requiring 12-bit
absolute accuracy. In such systems, the AD588 can provide a
known voltage for system calibration in software and the low
drift allows compensation for the drift of other components in
a system. Manual system calibration and the cost of periodic
recalibration can therefore be eliminated. Furthermore, the
mechanical instability of a trimming potentiometer and the
potential for improper calibration can be eliminated by using the
AD588 in conjunction autocalibration software.
The AD588 is available in seven versions. The AD588 JQ and
KQ grades are packaged in a 16-pin cerdip and are specified for
0°C to +70°C operation. AD588AQ and BQ grades are packaged
in a 16-pin cerdip and are specified for the –25°C to +85°C in-
dustrial temperature range. The ceramic AD588SQ and TQ
grades are specified for the full military/aerospace temperature
range. For military surface mount applications, the AD588SE
and TE grades are also available in 20-pin LCC packages.
*Covered by Patent Number 4,644,253.
PRODUCT HIGHLIGHTSThe AD588 offers 12-bit absolute accuracy without any user
adjustments. Optional fine-trim connections are provided for
applications requiring higher precision. The fine-trimming
does not alter the operating conditions of the Zener or the
buffer amplifiers and thus does not increase the temperature
drift.Output noise of the AD588 is very low—typically 6 μV p-p.
A pin is provided for additional noise filtering using an exter-
nal capacitor.A precision ±5 V tracking mode with Kelvin output connec-
tions is available with no external components. Tracking
error is less than one millivolt and a fine-trim is available for
applications requiring exact symmetry between the +5 V and
–5 V outputs.Pin strapping capability allows configuration of a wide variety
of outputs: ±5 V, +5 V and +10 V, –5 V & –10 V dual out-
puts or +5 V, –5 V, +10 V, –10 V single outputs.Extensive temperature testing at –55°C, –25°C, 0°C, +25°C,
+50°C, +70°C, +85°C and +125°C ensures that the speci-
fied temperature coefficient is truly representative of device
performance.
AD588–SPECIFICATIONS(typical @ + 258C, +10 V output, VS = 615 V unless otherwise noted1)
ORDERING GUIDENOTESOutputConfiguration
+10 VFigure 2a
–10 VFigure 2c
+5 V, –5 V, ±5 VFigure 2b
Specifications tested using +10 V configuration unless otherwise indicated.Gain and balance adjustments guaranteed capable of trimming output voltage
error and symmetry error to zero.Test Conditions:
+10 V Output–VS = –15 V, 13.5 V ≤ +VS ≤ 18 V
–10 V Output–18 V ≤ –VS ≤ –13.5 V, +VS = 15 V
±5 V Output+VS = +18 V, –VS = –18 V
+VS = +10.8 V, –VS = –10.8 V
Specifications subject to change without notice
ABSOLUTE MAXIMUM RATINGS*+VS to –VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36V
PowerDissipation (+25°C)
Q Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .600 mW
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering10sec) . . . . . . . .+300°C
Package Thermal Resistance
Q (θJA/θJC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90/25°C/W
Output Protection: All Outputs Safe If Shorted to Ground
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PIN CONFIGURATIONS
THEORY OF OPERATIONThe AD588 consists of a buried Zener diode reference, amplifi-
ers used to provide pin programmable output ranges, and asso-
ciated thin-film resistors as shown in the block diagram of
Figure 1. The temperature compensation circuitry provides the
device with a temperature coefficient of 1.5 ppm/°C or less.
Figure 1.AD588 Functional Block Diagram
Amplifier A1 performs several functions. A1 primarily acts to
REDUCTION pin (Pin 7) to form a low-pass filter and reduce
the noise contribution of the Zener to the circuit. Two matched
10 kΩ nominal thin-film resistors (R4 and R5) divide the 10 V
output in half. Pin VCT (Pin 11) provides access to the center of
the voltage span and Pin 12 (BALANCE ADJUST) can be used
for fine adjustment of this division.
Ground sensing for the circuit is provided by amplifier A2. The
noninverting input (Pin 9) senses the system ground which will
be transferred to the point on the circuit where the inverting
input (Pin 10) is connected. This may be Pin 6, 8 or 11. The
output of A2 drives Pin 8 to the appropriate voltage. Thus, if
Pin 10 is connected to Pin 8, the VLOW pin will be the same
voltage as the system ground. Alternatively, if Pin 10 is con-
nected to the VCT pin, it will be ground and Pin 6 and Pin 8 will
be +5 V and –5 V respectively.
Amplifiers A3 and A4 are internally compensated and are used
to buffer the voltages at Pins 6, 8, and 11 as well as to provide a
full Kelvin output. Thus, the AD588 has a full Kelvin capability
by providing the means to sense a system ground and provide
forced and sensed outputs referenced to that ground.
APPLYING THE AD588The AD588 can be configured to provide +10 V and –10 V ref-
erence outputs as shown in Figures 2a and 2c respectively. It
can also be used to provide +5 V, –5 V or a ±5 V tracking refer-
ence as shown in Figure 2b. Table I details the appropriate pin
connections for each output range. In each case, Pin 9 is con-
nected to system ground and power is applied to Pins 2 and 16.
The architecture of the AD588 provides ground sense and
uncommitted output buffer amplifiers which offer the user a
great deal of functional flexibility. The AD588 is specified and
tested in the configurations shown in Figure 2. The user may
choose to take advantage of the many other configuration op-
tions available with the AD588. However, performance in these
configurations is not guaranteed to meet the extremely stringent
data sheet specifications.
As indicated in Table I, a +5 V buffered output can be provided
using amplifier A4 in the +10 V configuration (Figure 2a). A
–5 V buffered output can be provided using amplifier A3 in the
–10 V configuration (Figure 2c). Specifications are not guaran-
teed for the +5 V or –5 V outputs in these configurations. Per-
formance will be similar to that specified for the +10 V or –10 V
outputs.
As indicated in Table I, unbuffered outputs are available at Pins
6, 8 and 11. Loading of these unbuffered outputs will impair
circuit performance.
Amplifiers A3 and A4 can be used interchangeably. However,
the AD588 is tested (and the specifications are guaranteed) with
the amplifiers connected as indicated in Figure 2 and Table I.
When either A3 or A4 is unused, its output force and sense pins
should be connected and the input tied to ground.
Two outputs of the same voltage may be obtained by connecting
both A3 and A4 to the appropriate unbuffered output on Pins 6,
8 or 11. Performance in these dual output configurations will
typically meet data sheet specifications.
Table I.AD588 Connections“Unbuffered” outputs should not be loaded.
accuracies of 12–16 bits. However, in applications where an
even greater level of accuracy is required, additional calibration
may be called for. Provision for trimming has been made
through the use of the GAIN ADJUST and BALANCE AD-
JUST pins (Pins 5 and 12 respectively).
The AD588 provides a precision 10 V span with a center tap
(VCT) which is used with the buffer and ground sense amplifiers
to achieve the voltage output configurations in Table I. GAIN
ADJUST and BALANCE ADJUST can be used in any of these
configurations to trim the magnitude of the span voltage and the
position of the center tap within the span. The GAIN ADJUST
should be performed first. Although the trims are not interactive
within the device, the GAIN trim will move the BALANCE trim
point as it changes the magnitude of the span.
Figure 2b shows GAIN and BALANCE trims in a +5 V and
–5 V tracking configuration. A 100 kΩ 20-turn potentiometer is
used for each trim. The potentiometer for GAIN trim is con-
nected between Pins 6 (VHIGH) and 8 (VLOW) with the wiper
connected to Pin 5 (GAIN ADJ). The potentiometer is adjusted
to produce exactly 10 V between Pins 1 and 15, the amplifier
outputs. The BALANCE potentiometer, also connected be-
tween Pins 6 and 8 with the wiper to Pin 12 (BAL ADJ), is then
adjusted to center the span from +5 V to –5 V.
Trimming in other configurations works in exactly the same
manner. When producing +10 V and +5 V, GAIN ADJ is used
to trim +10 V and BAL ADJ is used to trim +5 V. In the –10 V
and –5 V configuration, GAIN ADJ is again used to trim the
magnitude of the span, –10 V, while BAL ADJ is used to trim
the center tap, –5 V.
In single output configurations, GAIN ADJ is used to trim out-
puts utilizing the full span (+10 V or –10 V) while BAL ADJ is
used to trim outputs using half the span (+5 V or –5 V).
Input impedance on both the GAIN ADJUST and BALANCE
ADJUST pins is approximately 150 kΩ. The GAIN ADJUST
trim network effectively attenuates the 10 V across the trim
potentiometer by a factor of about 1500 to provide a trim range
of –3.5 mV to +7.5 mV with a resolution of approximately
Figure 2a.+10 V Output
Figure 2c. –10 V Output
Trimming the AD588 introduces no additional errors over tem-
perature so precision potentiometers are not required.
For single output voltage ranges, or in cases when BALANCE
ADJUST is not required, Pin 12 should be connected to Pin 11.
If GAIN ADJUST is not required, Pin 5 should be left floating.
NOISE PERFORMANCE AND REDUCTIONThe noise generated by the AD588 is typically less than 6 μV p-p
over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz bandwidth is
approximately 600 μV p-p. The dominant source of this noise is
the buried Zener which contributes approximately 100 nV/√Hz.
In comparison, the op amp’s contribution is negligible. Figure 3
shows the 0. 1 Hz to 10 Hz noise of a typical AD588.
Figure 3.0.1 Hz to 10 Hz Noise
If further noise reduction is desired, an optional capacitor may
be added between the NOISE REDUCTION pin and ground
as shown in Figure 2b. This will form a low-pass filter with the
4 kΩ RB on the output of the Zener cell. A 1 μF capacitor will
have a 3 dB point at 40 Hz and will reduce the high frequency
(to 1 MHz) noise to about 200 μV p-p. Figure 4 shows the
1 MHz noise of a typical AD588 both with and without a
1 μF capacitor.
Figure 4.Effect of 1 μF Noise Reduction Capacitor on
Broadband Noise
TURN-ON TIMEUpon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is the turn-on settling time. Two components normally as-
sociated with this are: time for active circuits to settle and time
for thermal gradients on the chip to stabilize. Figure 5 shows the
turn-on characteristics of the AD588. It shows the settling to be
about 600 μs. Note the absence of any thermal tails when the
horizontal scale is expanded to 2 ms/cm in Figure 5b.Electrical Turn-OnExtended Time Scale
Figure 5.Turn-On Characteristics
Output turn-on time is modified when an external noise reduc-
tion capacitor is used. When present, this capacitor presents an
additional load to the internal Zener diode’s current source, re-
sulting in a somewhat longer turn-on time. In the case of a 1 μF
capacitor, the initial turn-on time is approximately 60 ms (see
