AD578KN ,VERY FAST, COMPLETE 10- OR 12-BIT A/D CONVERTERSFEATURES
Performance
Complete 12-Bit A/D Converter with Reference and
Clock
Fast Conversi ..
AD578LD ,VERY FAST, COMPLETE 10- OR 12-BIT A/D CONVERTERScharacteristics of the AD578 include
t 1/2 LSB12 linearity error maximum at +25°C, maximum gain
..
AD578LN ,VERY FAST, COMPLETE 10- OR 12-BIT A/D CONVERTERSGENERAL DESCRIPTION
The ADS78 and AD579 are high speed 12-bit and 10-bit succes-
sive approxima ..
AD578SD ,VERY FAST, COMPLETE 10- OR 12-BIT A/D CONVERTERSSPECIFICATIONS (typical @ +N''t, :15 ll and +5 ll unless otherwise noted)
Model AD578] ADS78K AD ..
AD578TD ,VERY FAST, COMPLETE 10- OR 12-BIT A/D CONVERTERSapplications requiring faster conversion speeds and/or lower
resolution.
One Technology Way, P. ..
AD5790BCPZ , System Ready, 20-Bit, ±2LSB INL
AD9778ABSVZ , Dual, 12-/14-/16-Bit,1 GSPS
AD9779BSV , Dual 16-Bit, 1.0 GSPS D/A Converter
AD9779BSVZRL ,Dual 16-Bit, 1.0 GSPS D/A ConverterAPPLICATIONS high quality synthesis of wideband signals from baseband to high • Wireless Infrastruc ..
AD977A ,16-Bit, 200 kSPS, Serial I/O A/D ConverterSPECIFICATIONS (–40C to +85C, F = 100 kHz, V = V = 5 V, unless otherwise noted)S DIG ANA ..
AD977AAN ,16-Bit, 100 kSPS/200 kSPS BiCMOS A/D ConverterSPECIFICATIONS (–408C to +858C, F = 200 kHz, V = V = +5 V, unless otherwise noted)S DIG ANA ..
AD977AAR ,16-Bit, 100 kSPS/200 kSPS BiCMOS A/D Converterspecifications of offset, gain– 3.3 V, and unipolar ranges of 0 V to 10 V, 0 V to 5 V andand linear ..
AD578JD-AD578JN-AD578KD-AD578KN-AD578LD-AD578LN-AD578SD-AD578TD-AD579JN
VERY FAST, COMPLETE 10- OR 12-BIT A/D CONVERTERS
Cy, ANALOG
DEVICES
Very Fast, Complete
Ill- or 12-Bit " Converters
A0578/h0578
FEATURES
Performance
Complete 12-Bit AID Converter with Reference and
Fast Conversion: 3 us (max)
Buried Zener Reference for Long Term Stability and
Low Gain T.C.: t30 ppml°C max (ADS78)
t40 ppml°C max (AD579)
Max Nonlinearity:
No Missing Codes Over Temperature
Low Power: 555 mW (ADS78); 775 mW (AD579)
Available to MIL-STD-883
Versatility
Positive-True Parallel or Serial Logic Outputs
Short Cycle Capability
Precision +10 V Reference for External Applications
Adjustable Internal Clock
"Z" Models for :12 V Supplies
GENERAL DESCRIPTION
The ADS78 and ADS79 are high speed 12-bit and 10-bit succes-
sive approximation analog-to-digital converters that include in-
ternal clock, reference, and comparator. Their hybrid design
utilizes MSI digital and linear ICs in conjunction with a 12-bit
or 10-bit monolithic, monotonic DAC to provide superior per-
formance and versatility with IC size, price, and reliability.
Important performance characteristics of the ADS78 include
, 1/2 LSB 1 2 linearity error maximum at +25°C, maximum gain
tempco of t30 ppm/°C, and maximum conversion time of 3 us
at a typical power dissipation of 555 mW. The 10-bit AD579
provides tll LSB10 maximum linearity error at 1.8 ps maxi-
mum, and 775 mW typical Po.
Both the ADS78 and AD579 include scaling resistors that pro-
vide analog input signal ranges of t5 V, :10 V, and 0 to
+10 V. Both are contained in 32-pin ceramic side-brazed
DIP packages, and are available with MIL-STD-883 Class B
processing.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use; nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
F UNCTIONAL BLOCK DIAGRAM
ADS78/ADS79
(ADS78! BIT "
IAD578) BIT 11
BIT 10
SHORT CYCLE
DIGITAL GND
ANALOG GND
ZERO ADJ
20V SPAN INPUT
10V SPAN INPUT
BIPOLAR OFFSET
GAIN (REF IN)
REF OUT
SERIAL OUT
CONVERT START
CLOCK IN
" CLOCK our
+ CLOCK ADJ
COMPARATOR
PRODUCT HIGHLIGHTS
I. Both are complete analog-to-digital converters. No external
components are required to perform a conversion.
L The fast conversion rates-3 us for the ADS78, and 1.8 pts
for the AD579--make them. ideal candidates for high speed
data acquisition systems requiring high throughput.
3. The internal buried Zener reference is laser trimmed to high
initial accuracy and low T.C. and is available externally.
4. Precision thin film scaling resistors on the DAC provide for
excellent thermal tracking.
5. Short cycle and external clock capabilities are provided for
applications requiring faster conversion speeds and/or lower
resolution.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Telex: 924491
Fax: 617/326-8703 wa: 710/394-6577
Cable: ANALOG NORWOODMASS
AD578/AD579 --SPEtyFltWl0lG (typical @ +25%, :15 ll and +5 ll unless otherwise noted)
Model AD578] ADS78K AD578L AD57SSDI ADS78TDl
RESOLUTION 12 Bits A ' * *
ANALOG INPUTS
Voltage Ranges
Bipolar 15.0 V, :10 V * A
Unipolar Oto +10 V,0to +20V * A
Input Impedance
010+10V, 15V 5kiy * * * *
tio V, 0 to +20 V 10 kn . . . *
DIGITAL INPUTS
Convert Command' l LSTTL Load * * * *
Clock Input 1 LSTTL Load * . A *
TRANSFER CHARACTERISTICS
Gain Errors, ' 10.1% FSR, 10.25% FSR max . * A *
Unipolar Offset4 :0.1% FSR, 10.25% FSR max * . * *
Bipolar Error“ 5 :0.1% FSR, t0.25% FSR max * . . *
Linearity Error, +25°C t 1/2 LSB max * * * *
Tmin to Tm“ 1-3/4 LSB * * t3/4 LSB max 13/4 LSB max
DIFFERENTIAL LINEARITY ERROR
(Minimum resolution for which no
missing codes m guaranteed)
+25'C 12 Bits * A * *
Tmu, to Tm 12 Bits * * * *
POWER SUPPLY SENSITIVITY
+ 15 V 110% 0.005%l%AV5 max * . * *
--15 V 110% 0.005%/%AVS max * * A .
+5 V 110% 0.005%/%AV5 max * * * .
TEMPERATURE COEFFICIENTS
Gain t15 ppml°C typ A * * *
t30 pprnf'C max * * :50 ppm/'C max t30 ppm/“C max
Unipolar Offset t3 pprnPC typ * * . *
t10 ppmf'C max A * t15 ppmPC max :10 pprnPC max
Bipolar Offset t8 ppmPC typ * * * *
t20 ppmPC max * * ur25 ppm/°C max t20 ppmPC max
Differential Linearity t2 ppmPC typ * * . A
CONVERSION TIME" 7, tt (max) 6.0 us 4.5 ps 3 us 6.0 p.s 4.5 ps
PARALLEL OUTPUTS
Unipolar Code Binary . * . *
Bipolar Code Offset Binaryffwos Complement A * . .
Output Drive 2 LSTTL Loads * A A *
SERIAL OUTPUTS (NR2 FORMAT)
Unipolar Code Binary/Complcmentary Binary * . * *
Bipolar Code Offset Binary/Cdmp. Offset Binary * . A .
Output Drive 2 LSTTL Loads * * * *
END OF CONVERSION (EOC) Logic "I'' During Conversion * * * *
Output Drive 8 LSTTL Loads A * * *
INTERNAL CLOCK'
Output Drive 2 LSTTL Loads * A * *
INTERNAL REFERENCE
Voltage 10.000 :100 mV * * * t
Drift ' l2 ppmf'C, t20 pmeC max . * * A
External Current tl mA max * . * '
POWER SUPPLY REQUiREMENTS9
Range for Rated Accuracy 4.75 to 5.25 and 113.5 to ce, 16.5 A A * *
Supply Current +15 V 5 mA typ, 8 mA max A * * *
-15 V 22 mA typ, 35 mA max A A * *
+5V 30mAtyp,40mAmax * * * *
Power Dissipation 555 mW typ . * * *
TEMPERATURE RANGE
Operating o to +70°c * * -55T to +125°C -55'C to ~125°c
Storage -65'C to +150°C * * . *
1Available to MIL-STD-883, Level B. See ADI Military Products Databook for detail ipecifications.
2Positive pulse 200 ns wide (min) leading edge (0 to l) resets outputs. Trailing edge initiates conversion.
Will! 50 n, 1% fixed resistor in place of gain adjust potentiometer.
'Adiustable to zero.
5With 50 n, 1% resistor between Ref Out and Bipolat Offset (Pins 24 & 26).
'Conversion time is defined as the time between the falling edge of conven start and the falling edge of the EOC.
7Each grade is specified at the conversion speed shown.
aExternally adjustable by a resistor or capacitor (see Figure 6).
°For "Z" models order AD578Z], ZK, ZL (:11.6 V to :16.5 V).
*Specifications same as AD5781.
Specifications subject to change without notice.
REV. A
AD578/AD579
Model AD579JN AD579KN AD579TD'
RESOLUTION 10 Bits * *
ANALOG INPUTS
Voltage Ranges
Bipolar 15.0 v, :10 V * *
Unipolar 0m +10 V,Oto +20V * *
Input Impedance
Oto +10 V, 15V 5kn(s20%) * '
t10 V, 0 to +20 V 10 kn (120%) l *
DIGITAL INPUTS
Convert Commandz 1 LS'ITL Load * *
Clock Input 1 LSTTL Load * *
TRANSFER CHARACTERISTICS
Gain Error" ' 10.1% FSR (t0.25% FSR max) A *
Unipolar Offset3 10.1% FSR (10.25% FSR max) * *
Bipolar Errors, 4 t0.1% FSR (10.25% FSR max) . *
Linearity Error, +25°C tl/2 LSB max * *
Tu, to TL, t3/4 LSB A *
DIFFERENTIAL LINEARITY ERROR
(Minimum resolution for which no
missing codes are guaranteed)
+2YC 10 Bits * *
TU, to TL, 10 Bits * *
POWER SUPPLY SENSITIVITY
+15 V 110% 0.005%/%hVs max * *
-15 V 210% 0.005%/%AVS max * *
+5 V t10% 0.001%/%AVS max * *
"Z" Versions
+12 V 15% 0.007%/%Avs max * *
-12 v 5% 0.007%/%AVS max * A
TEMPERATURE COEFFICIENTS
Gain :25 ppmt'c typ . *
t40 ppml°C max . *
Unipolar Offset t5 ppmPC typ * *
=15 ppmt'C max * *
Bipolar Offset t8 ppme typ . *
t20 pmeC max A *
Differential Linearity t2 pmeC typ . *
CONVERSION TIMES, 6 (max) 2.2 ps 1 8 p.s "
Conversion Time TU, to Tm 2.4 ps 2 0 us **
PARALLEL OUTPUTS
Unipolar Code Bin A *
Bipolar Code Offset Binaryn'wos Complement * *
Output Drive 2 LSTTL Loads * A
SERIAL OUTPUTS (NR2 FORMAT)
Unipolar Code Binary/Oomplementary Binary * A
Bipolar Code Offset Binary/Comp. Offset Binary * *
Output Drive 2 1.8111. Loads * *
END OF CONVERSION (EOC) Logic "l" During Conversion . .
Output Drive 8 LSTTL Loads * *
INTERNAL CLOCK'
Output Drive 2 LSTTL Loads * *
INTERNAL REFERENCE
Voltage 10.000 t10 mV typ * *
Temperature Coefficient 15 13me * *
External Current tl mA max . *
POWER SUPPLY REQUIREMENTS
Range for Rated Accuracy 4.75 to 5.25 and t13.5 to 116.5 * A
Z Models' 4.75 to 5.25 and t11.4 to t16.5 * *
Supply Current +15 V 5 mA typ, 8 mA max t *
-15V 22mAtyp,35mAmax * .
+SV 100mAtyp,150rnAn1ax * *
Power Dissipation 775 mW typ * *
TEMPERATURE RANGE .
Operating 0 to +70°C A -55''C to +125°C
Storage -65'C to +150°C * *
1Avaiiabie to MiL-STD-883, Level B. See ADI Military Products Databook for detail specifications.
'Positive pulse 200 ns wide (min) leading edge (0 to 1) reiets outputs. Trailing edge initiates conversion.
3With 50 n, 1% rued resistor in place of gain adjust potentiometer.
'Adjustable to zero.
'With 50 n, 1% resistor between Ref Out and Bipolar Offset (Pins 24 & 26).
“Conversion time is defined as the time between the falling edge of convert start and the falling edge of the EOC,
7Each grade is specified at the conversion speed shown. See Figure 7 for appropriate connections.
'Externally adiustable by a resistor or capacitor.
'For "2" models order ADS79ZJN, AD579ZKN or ADS79ZTD.
'Specifications same as AD579JN.
"Specifications same as AD579KN.
Specifications subject to change without notice.
REV. A
AD578/A0579
ORDERING GUIDE1
Conversion Temperature Package
Model Resolution Speed Range Option2
AD578JN (JD) 12 Bits 6.0 ps 0°C to +70°C DH-32B
AD578KN (KD) 12 Bits 4.5 ps 0°C to +70°C DH-32B
AD578LN (LD) 12 Bits 3.0 MS 0°C to +70°C DH-32B
AD578SD 12 Bits 6.0 ps -5YC to +125°C DH-32B
AD578TD 12 Bits 4.5 ps -55T to +125°C DH-32B
AD578SD/883B 12 Bits 6.0 ps -55'C to +125°C DH-32B
AD578TD/883B 12 Bits 4.5 us -55''C to +125°C DH-32B
ADS79JN 10 Bits 2.2 us 0°C to +70°C DH-32B
ADS79KN 10 Bits 1.8 us 0°C to +70°C DH-32B
AD579TD 10 Bits 1.8 us -55°C to +125°C DH-32B
AD579TD/883B 10 Bits 1.8 p.s -55oC to +125°C DH-32B
'For t12 V operation "Z" Version, order AD578ZTD
THEORY OF OPERATION ,4 H.200“ min
The ADS78 is a complete pretrimmed 12-bit ND converter CONVERT
which requires no external components to provide the START 'i-CIT,,, ' 8thts l
successive-approximation analog-to-digital conversion function.
A block diagram of the AD578 is shown in Figure 1. CLOCK I __, l-uso,, ARM
ADSHIADSN
(Anew err " 45v
(mm an n nsv
MT " ANALOG sun
an s ZERO AW
arr a tk arv SPAN 'NNT
" 1 E mv sun INPUT
arr o ' awoua OFFSET
MT 5 8 GAIN IREF m)
an a E as: am
" , SERIAL OUT
arr , MKrAi7RTT
MT , couvzm START
517T soc
SHORT cvcu CLOCK m
CLOCK OUT
CLOCK ADJ
DKIITAL am
WARN") R
Figure 1. ADS78/AD579 Functional Block Diagram
and Pinout
When the control section is commanded to initiate a conversion
it enables the clock and resets the successive-approximation reg-
ister (SAR). The SAR, timed by the clock, sequences through
the conversion cycle and returns an end-of-convert flag to the
control section. The control section disables the clock and
brings the output status flag low. The data bits are valid on the
falling edge of the clock pulse starting with t1 and ending with
tl2 (Figure 2), and accurately represent the input signal to
within tl/2 LSB.
BIT1 ELL
BIT2 iiiilrV
ans Siiir-Li'
Eliig LF
Er"'-"""] i
$1M .__r
BIT tr
BITS iiiiiti"
BIT‘H w Ll"
BIT 12 = U
INTERNAL:
EXTERNAL:
CONNECT CLOCK OUT (18) TO CLOCK IN (19)
CONNECT EXTERNAL CLOCK TO CLOCK IN (19)
CLOCK SHOULD BE AT LEAST 30% DUTY CYCLE WITH
MINIMUM PERIOD, Tum OF 10thts.
1THE RISING EDGE OF CONVERT START PULSE RESETS THE MSB TO ZERO,
AND THE L385 TO ONE. THE TRAILING EDGE INITIATES CONVERSION.
Figure 2a. A0578 3 us Timing Diagram
REV. A
AD578/AD579
CONVERT
H. 200m. min
CONVERSION TIME
tatatwtststrttptatt
CONVERSION IN PROGRESS
PARALLEL DATA VAL
BIT ti
BIT 10
SERIAL EEEFiFlefcleFltzF'Ffi Ei
I I I l
INTERNAL:
CONNECT CLOCK OUY(18)T0 CLOCK IN 1191
EXTERNAL: CONNECT EXTERNAL CLOCK TO CLOCK IN (191
CLOCK SHOULD BE AT LEAST 30% DUTY CYCLE WITH
MINIMUM PERIOD. THIN OF Toons.
Figure 2b. A0579 Timing Diagram
The temperature-compensated buried Zener reference provides
the primary voltage reference to the DAC and guarantees excel-
lent stability with both time and temperature. The reference is
trimmed to 10.00 volts tl.0%, it is buffered and can supply up
to 1.0 mA to an external load in addition to the current required
to drive the reference input resistor (0.5 mA) and bipolar offset
resistor (1 mA). The thin-film application resistors are trimmed
to match the full scale output current of the DAC. There are
two 5 kn input scaling resistors to allow either a 10 volt or 20
REV. A
volt span. The 10 kn bipolar offset resistor is grounded for uni-
polar operation or connected to the 10 volt reference for bipolar
operation.
UNIPOLAR CALIBRATION
The AD578/AD579 is intended to have a nominal 1/2 LSB off-
set so that the exact analog input for a given code will be in the
middle of that code (halfway between the transitions to the
codes above and below it). Thus, when properly calibrated, the
first transition (from 0000 0000 0000 to 0000 0000 0001) will
occur for an input level of +1/2 LSB.
If Pin 26 is connected to Pin 30, the unit will behave in this
manner, within specifications. Refer to Table I, Table II, and
Figure 3 for further clarification. If the offset trim (R1) is used,
it should be trimmed as above, although a different offset can be
set for a particular system requirement. This circuit will give
approximately t25 mV of offset trim range.
The full scale trim is done by applying a signal 1 1/2 LSB below
the nominal full scale. Trim R2 to give the last transition (llll
11111110t0111111111111).
Brrs 1-12 (A0578)
en's 140010579)
ADS7BIAD579
" CLK OUT
BIPOFF @
Figure 3. Unipolar Input Connections
Table I. AD578 Digital Output Codes vs. Analog Input for Unipolar and Bipolar Ranges
Digital Output Code
Analog Input-Volts (Binary For Unipolar Ranges;
(Center of Quantization Interval) Offset Binary for Bipolar Ranges)
0to +10V 0to +20V -5Vto +5V -10Vto +10V BI B12
Range Range Range Range (MSB) (LSB)
+9.9976 +19.9951 +4.9976 +9.9951 1 1 1 l 1 1 1 l 1 l l l
+9.9952 +19.9902 T +4.9952 .+9.9902 l 1 1 l 1 1 l 1 l 1 l 0
C I I q .
O . . I I
+5.0024 + 10.0049 +0.0024 +0.0049 10 0 0 0 0 0 0 0 0 0 l
+5.0000 +10.0000 +0.0000 +0.0000 10 0 0 0 0 0 0 0 O 0 0
. O . . .
I . I C O
+0.0024 +0.0051 -4.9976 -9.9951 0 0 0 0 0 0 0 0 0 0 0 l
+0.0000 +0.0000 -5.0000 -10.0000 0 0 0 0 0 0 0 0 0 0 O 0
