AD574ATD-AD574AUD Fast Delivery |IC PHOENIX CO.,LIMITED

AD574ATD ,12-bit A/D converterSPECIFICATIONS unless otherwise noted) AD574AJ AD574AK AD574ALM ..
AD574AUD ,12-bit A/D converterFEATURESPIN CONFIGURATIONComplete 12-Bit A/D Converter with Referenceand Clock8- and 16-Bit Micropr ..
AD5754AREZ-REEL7 , Complete, Quad, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar Voltage Output DACs
AD5764ASU ,Complete, Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output D/A Converterfeatures a digital I/O port that may be Internal reference, 10 ppm/°C programmed via the serial int ..
AD5764ASUZ , Complete Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC
AD5764BSU ,Complete, Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output D/A Converterspecifications over the −40°C to +85°C industrial temperature range. See functional block diagram, ..
AD976ACRS ,16-Bit, 100 kSPS/200 kSPS BiCMOS A/D ConvertersGENERAL DESCRIPTIONPRODUCT HIGHLIGHTSThe AD976/AD976A is a high speed, low power 16-bit A/D1. Fast ..
AD976AN ,16-Bit, 100 kSPS/200 kSPS BiCMOS A/D ConvertersGENERAL DESCRIPTIONPRODUCT HIGHLIGHTSThe AD976/AD976A is a high speed, low power 16-bit A/D1. Fast ..
AD976AN ,16-Bit, 100 kSPS/200 kSPS BiCMOS A/D Convertersspecifications ofetary BiCMOS process, which has high performance bipolaroffset, gain and linearity ..
AD976AR ,16-Bit, 100 kSPS/200 kSPS BiCMOS A/D Convertersspecifications in dB are referred to a full scale – 10 V input.7Full-power bandwidth is defined as ..
AD976ARS ,16-Bit, 100 kSPS/200 kSPS BiCMOS A/D ConvertersSpecifications subject to change without notice.REV. C–2–AD976/AD976A(–408C to +858C, F = 100 kHz, ..
AD976BN ,16-Bit, 100 kSPS/200 kSPS BiCMOS A/D Convertersspecifications in dB are referred to a full scale – 10 V input.7Full-power bandwidth is defined as ..

AD574ATD-AD574AUD
12-bit A/D converter
BLOCK DIAGRAM AND
PIN CONFIGURATION
REV.BComplete
12-Bit A/D Converter
PRODUCT DESCRIPTION
The AD574A is a complete 12-bit successive-approximation
analog-to-digital converter with 3-state output buffer circuitry
for direct interface to an 8- or 16-bit microprocessor bus. A high
precision voltage reference and clock are included on-chip, and
the circuit guarantees full-rated performance without external
circuitry or clock signals.
The AD574A design is implemented using Analog Devices’
Bipolar/I2L process, and integrates all analog and digital func-
tions on one chip. Offset, linearity and scaling errors are mini-
mized by active laser-trimming of thin-film resistors at the wafer
stage. The voltage reference uses an implanted buried Zener for
low noise and low drift. On the digital side, I2L logic is used for
the successive-approximation register, control circuitry and
3-state output buffers.
The AD574A is available in six different grades. The AD574AJ,
K, and L grades are specified for operation over the 0°C to
+70°C temperature range. The AD574AS, T, and U are speci-
fied for the –55°C to +125°C range. All grades are available in a
28-pin hermetically-sealed ceramic DIP. Also, the J, K, and L
grades are available in a 28-pin plastic DIP and PLCC, and the
J and K grades are available in ceramic LCC.
The S, T, and U grades in ceramic DIP or LCC are available
with optional processing to MIL-STD-883C Class B; the T
and U grades are available as JAN QPL. The Analog Devices’
Military Products Databook should be consulted for details on
/883B testing of the AD574A.
*. Patent Nos. 3,803,590; 4,213,806; 4,511,413; RE 28,633.
FEATURES
Complete 12-Bit A/D Converter with Reference
and Clock
8- and 16-Bit Microprocessor Bus Interface
Guaranteed Linearity Over Temperature
08C to +708C – AD574AJ, K, L
–558C to +1258C – AD574AS, T, U
No Missing Codes Over Temperature
35 ms Maximum Conversion Time
Buried Zener Reference for Long-Term Stability
and Low Gain T.C.10 ppm/8C max AD574AL
12.5 ppm/8C max AD574AU
Ceramic DIP, Plastic DIP or PLCC Package
Available in Higher Speed, Pinout-Compatible Versions
(15 ms AD674B, 80 ms AD774B; 10 ms (with SHA) AD1674)
Available in Versions Compliant with MIL-STD-883 and
JAN QPL
PRODUCT HIGHLIGHTSThe AD574A interfaces to most 8- or 16-bit microproces-
sors. Multiple-mode three-state output buffers connect di-
rectly to the data bus while the read and convert commands
are taken from the control bus. The 12 bits of output data
can be read either as one 12-bit word or as two 8-bit bytes
(one with 8 data bits, the other with 4 data bits and 4 trailing
zeros).The precision, laser-trimmed scaling and bipolar offset resis-
tors provide four calibrated ranges: 0 volts to +10 volts and 0
volts to +20 volts unipolar, –5 volts to +5 volts and –10 volts
to +10 volts bipolar. Typical bipolar offset and full-scale cali-
bration errors of ±0.1% can be trimmed to zero with one ex-
ternal component each.The internal buried Zener reference is trimmed to 10.00
volts with 0.2% maximum error and 15 ppm/°C typical T.C.
The reference is available externally and can drive up to
1.5 mA beyond the requirements of the reference and bipolar
offset resistors.AD674B (15 μs) and AD774B (8 μs) provide higher speed,
pin compatibility; AD1674 (10 μs) includes on-chip Sample-
Hold Amplifier (SHA).
AD574A–SPECIFICATIONS
NOTESDetailed Timing Specifications appear in the Timing Section.12/8 Input is not TTL-compatible and must be hard wired to VLOGIC or Digital Common.
(@ +258C with VCC = +15 V or +12 V, VLOGIC = +5 V, VEE = –15 V or –12 V
unless otherwise noted)
NOTES
1Detailed Timing Specifications appear in the Timing Section.12/8 Input is not TTL-compatible and must be hard wired to VLOGIC or Digital Common.
3The reference should be buffered for operation on ±12 V supplies.D = Ceramic DIP.
Specifications subject to change without notice.
AD574A
AD574A
ORDERING GUIDE
NOTES
1X = Package designator. Available packages are:D (D-28) for all grades. E (E-28A) for J and K grades and /883B processed S, T
and U grades. N (N-28) for J, K, and L grades. P (P-28A) for PLCC in J, K grades. Example: AD574AKN is K grade in plastic DIP.
2For details on grade and package offerings screened in accordance with MIL-STD-883, refer to Analog Devices Military Products
Databook.
DIGITAL COMMON
+5V SUPPLY
VLOGIC
DATA MODE SELECT
12/8
STATUS
STS
DB11
MSB
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
LSB
DIGITAL
DATA
OUTPUTS
CHIP SELECT
BYTE ADDRESS/
SHORT CYCLE
READ/CONVERT
R/C
CHIP ENABLE
+12/+15V SUPPLY
VCC
+10V REFERENCE
REF OUT
ANALOG COMMON
REFERENCE INPUT
REF IN
-12/-15V SUPPLY
VEE
BIPOLAR OFFSET
BIP OFF
10V SPAN INPUT10VIN
20V SPAN INPUT
20VIN
AD574A Block Diagram and Pin Configuration
ABSOLUTE MAXIMUM RATINGS*
(Specifications apply to all grades, except where noted)
VCC to Digital Common . . . . . . . . . . . . . . . . . .0 V to +16.5 V
VEE to Digital Common . . . . . . . . . . . . . . . . . . .0 V to –16.5 V
VLOGIC to Digital Common . . . . . . . . . . . . . . . . . .0 V to +7 V
Analog Common to Digital Common . . . . . . . . . . . . . . .±1 V
Control Inputs (CE, CS, AO 12/8, R/C) to
Digital Common . . . . . . . . . . . . . .–0.5 V to VLOGIC + 0.5 V
Analog Inputs (REF IN, BIP OFF, 10 VIN) to
Analog Common . . . . . . . . . . . . . . . . . . . . . . . . .VEE to VCC
20 VIN to Analog Common . . . . . . . . . . . . . . . . . . . . . .±24 V
REF OUT . . . . . . . . . . . . . . . . . .Indefinite Short to Common
Momentary Short to VCC
Chip Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . .825 mW
Lead Temperature (Soldering, 10 sec). . . . . . . . . . . . .+300°C
Storage Temperature (Ceramic) . . . . . . . . . .–65°C to +150°C
(Plastic) . . . . . . . . . . . . . . . . . . . . . . . . . . .–25°C to +100°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
DEFINITIONS OF SPECIFICATIONS
LINEARITY ERROR
Linearity error refers to the deviation of each individual code
from a line drawn from “zero” through “full scale”. The point
used as “zero” occurs 1/2 LSB (1.22 mV for 10 volt span) be-
fore the first code transition (all zeros to only the LSB “on”).
“Full scale” is defined as a level 1 1/2 LSB beyond the last code
transition (to all ones). The deviation of a code from the true
straight line is measured from the middle of each particular
code.
The AD574AK, L, T, and U grades are guaranteed for maxi-
mum nonlinearity of ±1/2 LSB. For these grades, this means
that an analog value which falls exactly in the center of a given
code width will result in the correct digital output code. Values
nearer the upper or lower transition of the code width may pro-
duce the next upper or lower digital output code. The AD574AJ
and S grades are guaranteed to ±1 LSB max error. For these
grades, an analog value which falls within a given code width
will result in either the correct code for that region or either
adjacent one.
Note that the linearity error is not user-adjustable.
DIFFERENTIAL LINEARITY ERROR (NO MISSING
CODES)
A specification which guarantees no missing codes requires that
every code combination appear in a monotonic increasing se-
quence as the analog input level is increased. Thus every code
must have a finite width. For the AD574AK, L, T, and U
grades, which guarantee no missing codes to 12-bit resolution,
all 4096 codes must be present over the entire operating tem-
perature ranges. The AD574AJ and S grades guarantee no miss-
ing codes to 11-bit resolution over temperature; this means that
all code combinations of the upper 11 bits must be present; in
practice very few of the 12-bit codes are missing.
UNIPOLAR OFFSET
The first transition should occur at a level 1/2 LSB above analog
common. Unipolar offset is defined as the deviation of the actual
transition from that point. This offset can be adjusted as discussed
on the following two pages. The unipolar offset temperature
coefficient specifies the maximum change of the transition point
over temperature, with or without external adjustment.
BIPOLAR OFFSET
In the bipolar mode the major carry transition (0111 1111 1111
to 1000 0000 0000) should occur for an analog value 1/2 LSB
below analog common. The bipolar offset error and temperature
coefficient specify the initial deviation and maximum change in
the error over temperature.
QUANTIZATION UNCERTAINTY
Analog-to-digital converters exhibit an inherent quantization
uncertainty of ±1/2 LSB. This uncertainty is a fundamental
characteristic of the quantization process and cannot be reduced
for a converter of given resolution.
LEFT-JUSTIFIED DATA
The data format used in the AD574A is left-justified. This
means that the data represents the analog input as a fraction of
full-scale, ranging from 0 to
4096. This implies a binary point
to the left of the MSB.
FULL-SCALE CALIBRATION ERROR
The last transition (from 1111 1111 1110 to 1111 1111 1111)
should occur for an analog value 1 1/2 LSB below the nominal
full scale (9.9963 volts for 10.000 volts full scale). The full-scale
calibration error is the deviation of the actual level at the last
transition from the ideal level. This error, which is typically
0.05% to 0.1% of full scale, can be trimmed out as shown in
Figures 3 and 4.
TEMPERATURE COEFFICIENTS
The temperature coefficients for full-scale calibration, unipolar
offset, and bipolar offset specify the maximum change from the
initial (25°C) value to the value at TMIN or TMAX.
POWER SUPPLY REJECTION
The standard specifications for the AD574A assume use of
+5.00 V and ±15.00 V or ±12.00 V supplies. The only effect of
power supply error on the performance of the device will be a
small change in the full-scale calibration. This will result in a
linear change in all lower order codes. The specifications show
the maximum full-scale change from the initial value with the
supplies at the various limits.
CODE WIDTH
A fundamental quantity for A/D converter specifications is the
code width. This is defined as the range of analog input values
for which a given digital output code will occur. The nominal
value of a code width is equivalent to 1 least significant bit
(LSB) of the full-scale range or 2.44 mV out of 10 volts for a
12-bit ADC.
THE AD574A OFFERS GUARANTEED MAXIMUM LINEARITY ERROR OVER THE FULL OPERATING
TEMPERATURE RANGE
AD574A
CIRCUIT OPERATION
The AD574A is a complete 12-bit A/D converter which requires
no external components to provide the complete successive-
approximation analog-to-digital conversion function. A block
diagram of the AD574A is shown in Figure 1.
DIGITAL COMMON
+5V SUPPLY
VLOGIC
DATA MODE SELECT
12/8
STATUS
STS
DB11
MSB
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
LSB
DIGITAL
DATA
OUTPUTS
CHIP SELECT
BYTE ADDRESS/
SHORT CYCLEAO
READ/CONVERT
R/C
CHIP ENABLE
+12/+15V SUPPLY
VCC
+10V REFERENCE
REF OUT
ANALOG COMMON
REFERENCE INPUT
REF IN
-12/-15V SUPPLY
VEE
BIPOLAR OFFSET
BIP OFF
10V SPAN INPUT10VIN
20V SPAN INPUT
20VIN
Figure 1.Block Diagram of AD574A 12-Bit A-to-D Converter
When the control section is commanded to initiate a conversion
(as described later), it enables the clock and resets the successive-
approximation register (SAR) to all zeros. Once a conversion
cycle has begun, it cannot be stopped or restarted and data is
not available from the output buffers. The SAR, timed by the
clock, will sequence through the conversion cycle and return an
end-of-convert flag to the control section. The control section
will then disable the clock, bring the output status flag low, and
enable control functions to allow data read functions by external
command.
During the conversion cycle, the internal 12-bit current output
DAC is sequenced by the SAR from the most significant bit
(MSB) to least significant bit (LSB) to provide an output cur-
rent which accurately balances the input signal current through
the 5 kΩ (or 10 kΩ) input resistor. The comparator determines
whether the addition of each successively-weighted bit current
causes the DAC current sum to be greater or less than the input
current; if the sum is less, the bit is left on; if more, the bit is
turned off. After testing all the bits, the SAR contains a 12-bit
binary code which accurately represents the input signal to
within ±1/2 LSB.
The temperature-compensated buried Zener reference provides
the primary voltage reference to the DAC and guarantees excel-
lent stability with both time and temperature. The reference is
trimmed to 10.00 volts ±0.2%; it can supply up to 1.5 mA to an
external load in addition to the requirements of the reference in-
put resistor (0.5 mA) and bipolar offset resistor (1 mA) when
the AD574A is powered from ±15 V supplies. If the AD574A is
used with ±12 V supplies, or if external current must be sup-
plied over the full temperature range, an external buffer ampli-
fier is recommended. Any external load on the AD574A
reference must remain constant during conversion. The
DRIVING THE AD574 ANALOG INPUT
The internal circuitry of the AD574 dictates that its analog
input be driven by a low source impedance. Voltage changes at
the current summing node of the internal comparator result in
abrupt modulations of the current at the analog input. For accu-
rate 12-bit conversions the driving source must be capable of
holding a constant output voltage under these dynamically
changing load conditions.
Figure 2.Op Amp – AD574A Interface
The output impedance of an op amp has an open-loop value
which, in a closed loop, is divided by the loop gain available at
the frequency of interest. The amplifier should have acceptable
loop gain at 500 kHz for use with the AD574A. To check
whether the output properties of a signal source are suitable,
monitor the AD574’s input with an oscilloscope while a conver-
sion is in progress. Each of the 12 disturbances should subside
in 1 μs or less.
For applications involving the use of a sample-and-hold ampli-
fier, the AD585 is recommended. The AD711 or AD544 op
amps are recommended for dc applications.
SAMPLE-AND-HOLD AMPLIFIERS
Although the conversion time of the AD574A is a maximum of
35 μs, to achieve accurate 12-bit conversions of frequencies
greater than a few Hz requires the use of a sample-and-hold
amplifier (SHA). If the voltage of the analog input signal driving
the AD574A changes by more than 1/2 LSB over the time
interval needed to make a conversion, then the input requires a
SHA.
The AD585 is a high linearity SHA capable of directly driving
the analog input of the AD574A. The AD585’s fast acquisition
time, low aperture and low aperture jitter are ideally suited for
high-speed data acquisition systems. Consider the AD574A
converter with a 35 μs conversion time and an input signal of
10 V p-p: the maximum frequency which may be applied to
achieve rated accuracy is 1.5 Hz. However, with the addition of
an AD585, as shown in Figure 3, the maximum frequency
increases to 26 kHz.
The AD585’s low output impedance, fast-loop response, and
low droop maintain 12-bits of accuracy under the changing load
conditions that occur during a conversion, making it suitable for
use in high accuracy conversion systems. Many other SHAs
cannot achieve 12-bits of accuracy and can thus compromise a

Partno	Mfg	Dc	Qty	Available	Descript
AD574ATD	AD	N/a	200	avai	12-bit A/D converter
AD574AUD		N/a	13	avai	12-bit A/D converter