AD536A ,Complete Monolithic IC Which Performs True RMS-to-DC ConversionFEATURES PIN CONFIGURATIONS ANDTrue RMS-to-DC Conversion FUNCTIONAL BLOCK DIAGRAMSLaser-Trimmed to ..
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AD536A
Complete Monolithic IC Which Performs True RMS-to-DC Conversion
REV. B
Integrated Circuitrue RMS-to-DC Converter
FEATURES
True RMS-to-DC Conversion
Laser-Trimmed to High Accuracy
0.2% Max Error (AD536AK)
0.5% Max Error (AD536AJ)
Wide Response Capability:
Computes RMS of AC and DC Signals
450 kHz Bandwidth: V rms > 100 mV
2 MHz Bandwidth: V rms > 1 V
Signal Crest Factor of 7 for 1% Error
dB Output with 60 dB Range
Low Power: 1.2 mA Quiescent Current
Single or Dual Supply Operation
Monolithic Integrated Circuit
–55�C to +125�C Operation (AD536AS)
PRODUCT DESCRIPTIONThe AD536A is a complete monolithic integrated circuit which
performs true rms-to-dc conversion. It offers performance which
is comparable or superior to that of hybrid or modular units
costing much more. The AD536A directly computes the true
rms value of any complex input waveform containing ac and dc
components. It has a crest factor compensation scheme which
allows measurements with 1% error at crest factors up to 7. The
wide bandwidth of the device extends the measurement capabi-
lity to 300 kHz with 3 dB error for signal levels above 100 mV.
An important feature of the AD536A not previously available in
rms converters is an auxiliary dB output. The logarithm of the
rms output signal is brought out to a separate pin to allow the
dB conversion, with a useful dynamic range of 60 dB. Using an
externally supplied reference current, the 0 dB level can be con-
veniently set by the user to correspond to any input level from
0.1 to 2 volts rms.
The AD536A is laser trimmed at the wafer level for input and
output offset, positive and negative waveform symmetry (dc re-
versal error), and full-scale accuracy at 7 V rms. As a result, no
external trims are required to achieve the rated unit accuracy.
There is full protection for both inputs and outputs. The input
circuitry can take overload voltages well beyond the supply lev-
els. Loss of supply voltage with inputs connected will not cause
unit failure. The output is short-circuit protected.
The AD536A is available in two accuracy grades (J, K) for com-
mercial temperature range (0°C to +70°C) applications, and one
grade (S) rated for the –55°C to +125°C extended range. The
AD536AK offers a maximum total error of ±2 mV ±0.2% of
reading, and the AD536AJ and AD536AS have maximum errors
of ±5 mV ±0.5% of reading. All three versions are available in
either a hermetically sealed 14-lead DIP or 10-pin TO-100
metal can. The AD536AS is also available in a 20-leadless her-
metically sealed ceramic chip carrier.
PRODUCT HIGHLIGHTSThe AD536A computes the true root-mean-square level of a
complex ac (or ac plus dc) input signal and gives an equiva-
lent dc output level. The true rms value of a waveform is a
more useful quantity than the average rectified value since it
relates directly to the power of the signal. The rms value of a
statistical signal also relates to its standard deviation.The crest factor of a waveform is the ratio of the peak signal
swing to the rms value. The crest factor compensation
scheme of the AD536A allows measurement of highly com-
plex signals with wide dynamic range.The only external component required to perform measure-
ments to the fully specified accuracy is the capacitor which
sets the averaging period. The value of this capacitor determines
the low frequency ac accuracy, ripple level and settling time.The AD536A will operate equally well from split supplies or
a single supply with total supply levels from 5 to 36 volts.
The one milliampere quiescent supply current makes the
device well-suited for a wide variety of remote controllers and
battery powered instruments.The AD536A directly replaces the AD536 and provides im-
proved bandwidth and temperature drift specifications.
PIN CONFIGURATIONS AND
FUNCTIONAL BLOCK DIAGRAMS
LCC (E-20A) Package
VINNC
CAV
+VS
COMIOUT
NC = NO CONNECT
–VS
BUF
OUT
BUFNC
TO-116 (D-14) and
Q-14 Package
TO-100 (H-10A)
Package
BUF
AD536A
VINCAV+VS
IOUT
–VS
BUF
OUT
BUF IN
AD536A–SPECIFICATIONSNOTES
1Accuracy is specified for 0 V to 7 V rms, dc or 1 kHz sine wave input with the AD536A connected as in the figure referenced.
2Error vs. crest factor is specified as an additional error for 1 V rms rectangular pulse input, pulsewidth = 200 µs.
3Input voltages are expressed in volts rms, and error is percent of reading.
4With 2k external pull-down resistor.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed,
although only those shown in boldface are tested on all production units.
(@ +25�C, and �15V dc unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS1Supply Voltage
Dual Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V
Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+36 V
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . .500 mW
Maximum Input Voltage . . . . . . . . . . . . . . . . . . . .±25 V Peak
Buffer Maximum Input Voltage . . . . . . . . . . . . . . . . . . . . .±VS
Maximum Input Voltage . . . . . . . . . . . . . . . . . . . .±25 V Peak
Storage Temperature Range . . . . . . . . . . . .–55°C to +150°C
Operating Temperature Range
AD536AJ/K . . . . . . . . . . . . . . . . . . . . . . . . . .0°C to +70°C
AD536AS . . . . . . . . . . . . . . . . . . . . . . . .–55°C to +125°C
Lead Temperature Range
(Soldering 60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . .+300°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1000 V
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.10-Pin Header:θJA = 150°C/W; 20-Leadless LCC: θJA = 95°C/W; 14-Lead Size
Brazed Ceramic DIP: θJA = 95°C/W.
CHIP DIMENSIONS AND PAD LAYOUTDimensions shown in inches and (mm).
ORDERING GUIDE
STANDARD CONNECTIONThe AD536A is simple to connect for the majority of high accu-
racy rms measurements, requiring only an external capacitor to
set the averaging time constant. The standard connection is
shown in Figure 1. In this configuration, the AD536A will mea-
sure the rms of the ac and dc level present at the input, but will
show an error for low frequency inputs as a function of the filter
capacitor, CAV, as shown in Figure 5. Thus, if a 4 µF capacitor
is used, the additional average error at 10 Hz will be 0.1%, at
3 Hz it will be 1%. The accuracy at higher frequencies will be
according to specification. If it is desired to reject the dc input, a
capacitor is added in series with the input, as shown in Figure 3,
the capacitor must be nonpolar. If the AD536A is driven with
power supplies with a considerable amount of high frequency
ripple, it is advisable to bypass both supplies to ground with
0.1 µF ceramic discs as near the device as possible.
Figure 1.Standard RMS Connection
AD536AThe input and output signal ranges are a function of the supply
voltages; these ranges are shown in Figure 14. The AD536A can
also be used in an unbuffered voltage output mode by discon-
necting the input to the buffer. The output then appears unbuf-
fered across the 25 kΩ resistor. The buffer amplifier can then be
used for other purposes. Further the AD536A can be used in a
current output mode by disconnecting the 25 kΩ resistor from
ground. The output current is available at Pin 8 (Pin 10 on the
“H” package) with a nominal scale of 40 µA per volt rms input
positive out.
OPTIONAL EXTERNAL TRIMS FOR HIGH ACCURACYIf it is desired to improve the accuracy of the AD536A, the
external trims shown in Figure 2 can be added. R4 is used to
trim the offset. Note that the offset trim circuit adds 365 Ω in
series with the internal 25 kΩ resistor. This will cause a 1.5%
increase in scale factor, which is trimmed out by using R1 as
shown. Range of scale factor adjustment is ±1.5%.
The trimming procedure is as follows:Ground the input signal, VIN, and adjust R4 to give zero
volts output from Pin 6. Alternatively, R4 can be adjusted to
give the correct output with the lowest expected value of VIN.Connect the desired full scale input level to VIN, either dc or
a calibrated ac signal (1 kHz is the optimum frequency);
then trim R1, to give the correct output from Pin 6, i.e.,
1000 V dc input should give 1.000 V dc output. Of course, a
±1.000 V peak-to-peak sine wave should give a 0.707 V dc
output. The remaining errors, as given in the specifications
are due to the nonlinearity.
The major advantage of external trimming is to optimize device
performance for a reduced signal range; the AD536A is inter-
nally trimmed for a 7 V rms full-scale range.
Figure 2.Optional External Gain and Output Offset Trims
SINGLE SUPPLY CONNECTIONThe applications in Figures l and 2 require the use of approxi-
mately symmetrical dual supplies. The AD536A can also be
used with only a single positive supply down to +5 volts, as
shown in Figure 3. The major limitation of this connection is
by using a resistive divider between +VS and ground. The values
of the resistors can be increased in the interest of lowered power
consumption, since only 5 mA of current flows into Pin 10
(Pin 2 on the “H” package). AC input coupling requires only
capacitor C2 as shown; a dc return is not necessary as it is
provided internally. C2 is selected for the proper low frequency
break point with the input resistance of 16.7 kΩ; for a cutoff at
10 Hz, C2 should be 1 µF. The signal ranges in this connection
are slightly more restricted than in the dual supply connection.
The input and output signal ranges are shown in Figure 14. The
load resistor, RL, is necessary to provide output sink current.
Figure 3.Single Supply Connection
CHOOSING THE AVERAGING TIME CONSTANTThe AD536A will compute the rms of both ac and dc signals.
If the input is a slowly-varying dc signal, the output of the
AD536A will track the input exactly. At higher frequencies, the
average output of the AD536A will approach the rms value of
the input signal. The actual output of the AD536A will differ
from the ideal output by a dc (or average) error and some
amount of ripple, as demonstrated in Figure 4.
Figure 4.Typical Output Waveform for Sinusoidal Input
The dc error is dependent on the input signal frequency and the
value of CAV. Figure 5 can be used to determine the minimum
value of CAV which will yield a given percent dc error above a
given frequency using the standard rms connection.
The ac component of the output signal is the ripple. There are
factors, (such as low duty cycle pulse trains), the averaging time
constant should be at least ten times the signal period. For
example, a 100 Hz pulse rate requires a 100 ms time constant,
which corresponds to a 4 µF capacitor (time constant = 25 ms
per µF).
The primary disadvantage in using a large CAV to remove ripple
is that the settling time for a step change in input level is in-
creased proportionately. Figure 5 shows that the relationship
between CAV and 1% settling time is 115 milliseconds for each
microfarad of CAV. The settling time is twice as great for de-
creasing signals as for increasing signals (the values in Figure 5
are for decreasing signals). Settling time also increases for low
signal levels, as shown in Figure 6.
Figure 5.Error/Settling Time Graph for Use with the Stan-
dard rms Connection in Figure 1
Figure 6.Settling Time vs. Input Level
A better method for reducing output ripple is the use of a
“post-filter.” Figure 7 shows a suggested circuit. If a single-pole
filter is used (C3 removed, RX shorted), and C2 is approximately
twice the value of CAV, the ripple is reduced as shown in Figure
8 and settling time is increased. For example, with CAV = 1 µF
and C2 = 2.2 µF, the ripple for a 60 Hz input is reduced from
10% of reading to approximately 0.3% of reading. The settling
time, however, is increased by approximately a factor of 3. The
values of CAV and C2, can, therefore, be reduced to permit faster
settling times while still providing substantial ripple reduction.
The two-pole post-filter uses an active filter stage to provide
even greater ripple reduction without substantially increasing
the settling times over a circuit with a one-pole filter. The values
of CAV, C2, and C3 can then be reduced to allow extremely fast
settling times for a constant amount of ripple. Caution should
be exercised in choosing the value of CAV, since the dc error is
dependent upon this value and is independent of the post filter.
For a more detailed explanation of these topics refer to the
RMS to DC Conversion Application Guide 2nd Edition, available
from Analog Devices.
Figure 7.2-Pole “Post” Filter
Figure 8.Performance Features of Various Filter Types
AD536A PRINCIPLE OF OPERATIONThe AD536A embodies an implicit solution of the rms equation
that overcomes the dynamic range as well as other limitations
inherent in a straightforward computation of rms. The actual
computation performed by the AD536A follows the equation:
AD536AFigure 9 is a simplified schematic of the AD536A; it is subdi-
vided into four major sections: absolute value circuit (active
rectifier), squarer/divider, current mirror, and buffer amplifier.
The input voltage, VIN, which can be ac or dc, is converted to a
unipolar current I1, by the active rectifier A1, A2. I1 drives one
input of the squarer/divider, which has the transfer function:
The output current, I4, of the squarer/divider drives the current
mirror through a low-pass filter formed by R1 and the externally
connected capacitor, CAV. If the R1, CAV time constant is much
greater than the longest period of the input signal, then I4 is
effectively averaged. The current mirror returns a current I3,
which equals Avg. [I4], back to the squarer/divider to complete
the implicit rms computation. Thus:
Figure 9.Simplified Schematic
The current mirror also produces the output current, IOUT,
which equals 2I4. IOUT can be used directly or converted to a
voltage with R2 and buffered by A4 to provide a low impedance
voltage output. The transfer function of the AD536A thus
results:
The dB output is derived from the emitter of Q3, since the
voltage at this point is proportional to –log VIN. Emitter fol-
lower, Q5, buffers and level shifts this voltage, so that the dB
output voltage is zero when the externally supplied emitter
current (IREF) to Q5 approximates I3.
CONNECTIONS FOR dB OPERATIONA powerful feature added to the AD536A is the logarithmic or
decibel output. The internal circuit computing dB works accu-
rately over a 60 dB range. The connections for dB measure-
ments are shown in Figure 10. The user selects the 0 dB level by
adjusting R1, for the proper 0 dB reference current (which is set
to exactly cancel the log output current from the squarer-divider
at the desired 0 dB point). The external op amp is used to pro-
vide a more convenient scale and to allow compensation of the
+0.33%/°C scale factor drift of the dB output pin. The special
T.C. resistor, R2, is available from Tel Labs in Londonderry,
N.H. (model Q-81) or from Precision Resistor Inc., Hillside,
N.J. (model PT146). The averaged temperature coefficients of
resistors R2 and R3 develop the +3300 ppm needed to reverse
compensate the dB output. The linear rms output is available at
Pin 8 on DIP or Pin 10 on header device with an output imped-
ance of 25 kΩ; thus some applications may require an additional
buffer amplifier if this output is desired.
dB Calibration:
1. Set VIN = 1.00 V dc or 1.00 V rms
2. Adjust R1 for dB out = 0.00 V
3. Set VIN = +0.1 V dc or 0.10 V rms
4. Adjust R5 for dB out = –2.00 V
Any other desired 0 dB reference level can be used by setting
VIN and adjusting R1, accordingly. Note that adjusting R5 for
the proper gain automatically gives the correct temperature
compensation.
