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AD5259BRMZ10-AD5259BRMZ100-AD5259BRMZ100-R7-AD5259BRMZ10-R7-AD5259BRMZ50
Nonvolatile, I2C Compatible 256-Position, Digital Potentiometer
Nonvolatile, I2C Compatible
256-Position, Digital Potentiometer
FEATURES
Nonvolatile memoy maintains wiper settings
256-position
Compact MSOP-10 (3 mm × 4.9 mm) package 2C® compatible interface
VLOGIC pin provides increased interface flexibility.
End-to-end resistance 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Resistance tolerance stored in EEMEM(0.1% accuracy)
Power On EEMEM Refresh Time < 1ms
Software write protect command
Tri-state address decode pins AD0 and AD1
100-year typical data retention at 55°C
Wide operating temperature –40°C to +85°C
+3V to +5V single-supply
APPLICATIONS
LCD panel VCOM adjustment
LCD panel brightness and contrast control
Mechanical potentiometer replacement in new designs
Programmable power supplies
RF amplifier biasing
Automotive electronics adjustment
Gain control and offset adjustment
Low resolution DAC replacement
Electronics level settings
GENERAL OVERVIEW The AD5259 provides a compact nonvolatile 3 mm × 4.9 mm
packaged solution for 256-position adjustment applications.
These devices perform the same electronic adjustment function
as mechanical potentiometers or variable resistors, with
enhanced resolution and solid-state reliability.
The wiper settings are controllable through an I2C compatible
digital interface, which can also be used to read back the wiper
register and EEMEM content. Resistor tolerance is also stored
within EEMEM and can be used to provide an end-to-end
tolerance accuracy of 0.1%. In order to provide added security,
command bits are available to place the part into a write protect
mode in which data can not be written to the EEMEM register.
In addition, a separate VLOGIC pin provides the user with
increased interface flexibility. For users who need multiple
parts on one bus, address bits AD0 and AD1 allow up to nine
devices on the same bus.
FUNCTIONAL BLOCK DIAGRAMS SCL
SDA
AD0
VDD
VLOGIC
DGND
AD1
Figure 1.
Figure 3. Pinout.
Note:
The terms digital potentiometer, VR, and RDAC are used interchangeably.
Purchase of licensed I2C components of Analog Devices or one of its sublicensed
Associated Companies conveys a license for the purchaser under the Philips I2C
Patent Rights to use these components in an I2C system, provided that the system
conforms to the I2C Standard Specification as defined by Philips.
AD0
AD1
SDA
SCL
AD5259
TOP VIEW
(Not to Scale)
VDD G ND
VLOGIC TABLE OF CONTENTS Electrical Characteristics—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Versions..............................................................................................3
Timing Characteristics—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Versions4
Absolute Maximum Ratings1..........................................................5
Outline Dimensions.......................................................................12
Ordering Guide..........................................................................13
ESD Caution................................................................................13
REVISION HISTORY Revision 0: Initial Version
SCL
SDA
AD0
AD1DD
GND
Vlogic Figure 3. Block diagram showing level shifters
ELECTRICAL CHARACTERISTICS—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS (VDD = 5 V ± 10%, or 3 V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +85°C; unless otherwise noted.)
Table 1. TIMING CHARACTERISTICS—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS (VDD = +5V ± 10%, or +3V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +85°C; unless otherwise noted.)
Table 2.
SCL
SDAFigure 4. I2C Interface Timing Diagram
2C INTERFACE Table 3. Generic Interface Format
Table 4. Device Address Lookup*
(Note that AD1 and AD0 are tri-state address pins) S = Start Condition
P = Stop Condition
SA = Slave Acknowledge
MA = Master Acknowledge
NA = No Acknowledge
X = Don’t Care
W = Write
R = Read
Table 5. RDAC-to-EEMEM Interface Command Descriptions
Write Modes
Table 6. Writing to RDAC register
Table 7. Writing to EEPROM register
Table 8. Activating Software Write Protect
Store/Restore Modes
Table 9. Storing RDAC value to EEPROM
Table 10. Restoring EEPROM to RDAC
S = Start Condition
P = Stop Condition
SA = Slave Acknowledge
MA = Master Acknowledge
NA = No Acknowledge
X = Don’t Care
W = Write
R = Read
Read Modes
Table 11. Traditional Read back of RDAC Register value
Repeat start
Table 12. Traditional Read back of stored EEPROM value
Repeat start
Table 13. Traditional Read back of Tolerance
i. Consecutively
Repeat start
ii. Individually
Repeat start
Repeat start
Note: Read modes above are referred to as traditional because the first two bytes for all three cases are “dummy” bytes which function to
