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AD5241BR10
I2C® Compatible Digital Potentiometer
REV.B
FUNCTIONAL BLOCK DIAGRAM
SHDN
VDD
VSS
SDA
SCL
GNDB1A2W2B2O1
AD0AD1
FEATURES
256 Positionsk�, 100k�, 1M�
Low Tempco 30 ppm/�C
Internal Power ON Midscale Preset
Single-Supply 2.7V to 5.5V or
Dual-Supply �2.7V for AC or Bipolar Operation2C Compatible Interface with Readback Capability
Extra Programmable Logic Outputs
Self-Contained Shutdown Feature
Extended Temperature Range –40�C to +105�C
APPLICATIONS
Multimedia, Video, and Audio
Communications
Mechanical Potentiometer Replacement
Instrumentation: Gain, Offset Adjustment
Programmable Voltage-to-Current Conversion
Line Impedance Matching
GENERAL DESCRIPTIONThe AD5241/AD5242 provide a single-/dual-channel, 256-
position, digitally controlled variable resistor (VR) device. These
devices perform the same electronic adjustment function as a
potentiometer, trimmer, or variable resistor. Each VR offers a
completely programmable value of resistance between the A
Terminal and the wiper, or the B Terminal and the wiper.
For AD5242, the fixed A-to-B terminal resistance of 10kΩ,
100kΩ, or 1MΩ has a 1% channel-to-channel matching
tolerance. The nominal temperature coefficient of both parts isppm/°C.
Wiper position programming defaults to midscale at system
power ON. Once powered, the VR wiper position is programmed
by an I2C compatible 2-wire serial data interface. Both parts
have available two extra programmable logic outputs that
enable users to drive digital loads, logic gates, LED drivers, and
analog switches in their system.
The AD5241/AD5242 are available in surface-mount (SOIC-14/-
16) packages and, for ultracompact solutions, TSSOP-14/-16
packages. All parts are guaranteed to operate over the
extended temperature range of –40°C to +105°C. For 3-wire,
SPI compatible interface applications, please refer to AD5200,
AD5201, AD5203, AD5204, AD5206, AD5231*, AD5232*,
AD5235*, AD7376, AD8400, AD8402, and AD8403 products.
2C® Compatible
256-Position Digital Potentiometers*Nonvolatile digital potentiometer2C is a registered trademark of Philips Corporation.
AD5241/AD5242–SPECIFICATIONS
10 k�, 100 k�, 1M� VERSIONDC CHARACTERISTICS, RHEOSTAT MODE (Specifications apply to all VRs.)
DIGITAL INPUTS
DIGITAL OUTPUT
POWER SUPPLIES
DYNAMIC CHARACTERISTICS
(VDD = 3V � 10% or 5 V � 10%, VA = +VDD, VB = 0V, –40�C < TA < +105�C, unless
otherwise noted.)
AD5241/AD5242INTERFACE TIMING CHARACTERISTICS (Applies to all parts.
NOTES
1Typicals represent average readings at 25°C, VDD = 5 V.
2Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Test Circuits.
3INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of ±1LSB maximum are guaranteed monotonic operating conditions. See Figure 10.
4Resistor terminals A, B, W have no limitations on polarity with respect to each other.
5Guaranteed by design and not subject to production test.
6PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
7Bandwidth, noise, and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest band-
width. The highest R value results in the minimum overall power consumption.
8All dynamic characteristics use VDD = 5 V.
9See timing diagram for location of measured values.
Specifications subject to change without notice.
AD5241/AD5242
ABSOLUTE MAXIMUM RATINGS*(TA = 25°C, unless otherwise noted.)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V , –7 V
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
VA, VB, VW to GND . . . . . . . . . . . . . . . . . . . . . . . . . .VSS, VDD
AX–BX, AX–WX, BX–WX at 10kΩ in TSSOP-14 . . . ±5.0 mA*
AX–BX, AX–WX, BX–WX at 100kΩ in TSSOP-14 . . ±1.5 mA*
AX–BX, AX–WX, BX–WX at 1MΩ in TSSOP-14 . . . ±0.5 mA*
Digital Input Voltage to GND . . . . . . . . . . . . . . . . . . 0 V, 7 V
Operating Temperature Range . . . . . . . . . . –40°C to +105°C
Thermal Resistance θJA
SOIC (SOIC-14) . . . . . . . . . . . . . . . . . . . . . . . . . 158°C/W
SOIC (SOIC-16) . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
TSSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
TSSOP-16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180°C/W
Maximum Junction Temperature (TJmax) . . . . . . . . . . 150°C
Package Power Dissipation PD = (TJmax – TA)/θJA
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperatures
R-14, R-16A, RU-14, RU-16 (Vapor Phase, 60 sec) . 215°C
R-14, R-16A, RU-14, RU-16 (Infrared, 15 sec) . . . . . 220°C
*Max current increases at lower resistance and different packages.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD5241/AD5242 feature proprietary ESD protection circuitry, permanent damage may occur
on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDEAD5241BR10
AD5241BR10-REEL7
AD5241BRU10-REEL7
AD5241BR100
AD5241BR100-REEL7
AD5241BRU100-REEL7
AD5241BR1M
AD5241BRU1M-REEL7
AD5242BR10
AD5242BR10-REEL7
AD5242BRU10-REEL7
AD5242BR100
AD5242BR100-REEL7
AD5242BRU100-REEL7
AD5242BR1M
NOTES
1The AD5241/AD5242 die size is 69 mil × 78 mil, 5,382 sq. mil. Contains 386 transistors for each channel. Patent Number 5495245 applies.
2TSSOP packaged units are only available in 1,000-piece quantity Tape and Reel.
AD5242 PIN FUNCTION DESCRIPTIONS
AD5241 PIN CONFIGURATION
AD5242 PIN CONFIGURATION
AD5241 PIN FUNCTION DESCRIPTIONS
AD5241/AD5242Figure 1.Detail Timing Diagram
Data of AD5241/AD5242 is accepted from the I2C bus in the following serial format:
where:
S = Start Condition
P = Stop Condition
A = Acknowledge
X = Don’t Care
AD1, AD0 = Package pin programmable address bits. Must be matched with the logic states at Pins AD1 and AD0.
R/W = Read Enable at High and output to SDA. Write Enable at Low.
A/B = RDAC subaddress select. ‘0’ for RDAC1 and ‘1’ for RDAC2.
RS = Midscale reset, active high.
SD = Shutdown in active high. Same as SHDN except inverse logic.
O1, O2 = Output logic pin latched values.
D7, D6, D5, D4, D3, D2, D1, D0 = Data Bits.
911991011AD1AD0R/WA/BRSSDO1O2XXXD7D6D5D4D3D2D1D0
ACK BYAD5241ACK BYAD5241ACK BYAD5241
STOP BYMASTERSTART BYMASTERFRAME 1
SLAVE ADDRESS BYTE
FRAME 2
INSTRUCTION BYTE
FRAME 3
DATA BYTE
SCL
SDAFigure 2.Writing to the RDAC Serial Register
Figure 3.Reading Data from a Previously Selected RDAC Register in Write Mode
TPC 1.RDNL vs. Code
TPC 2.RINL vs. Code
TPC 3.DNL vs. Code
TPC 4.INL vs. Code
TPC 5.Nominal Resistance vs. Temperature
TPC 6.Supply Current vs. Input Logic Voltage
AD5241/AD5242TPC 7.Shutdown Current vs. Temperature
CODE – Decimal
POTENTIOMETER MODE TEMPCO – ppm
/ �
160192224256TPC 8.�VWB/�T Potentiometer Mode Tempco
TPC 9.�RWB/�T Rheostat Mode Tempco
TPC 10.Incremental Wiper Contact vs. VDD/VSS
TPC 11.Supply Current vs. Frequency
TPC 12.AD5242 10 kΩ Gain vs. Frequency vs. Code
