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AD5231BRU-10
Nonvolatile, Single, 1024-Position Digital Potentiometer
Nonvolatile Memory,
1024-Position Digital Potentiometer
Rev. B
FEATURES
1024-position resolution
Nonvolatile memory maintains wiper setting
Power-on refresh with EEMEM setting
EEMEM restore time: 140 µs typ
Full monotonic operation
10 kΩ, 50 kΩ, and 100 kΩ terminal resistance
Permanent memory write protection
Wiper setting readback
Predefined linear increment/decrement instructions
Predefined ±6 dB/step log taper increment/decrement
instructions
SPI®-compatible serial interface
3 V to 5 V single-supply or ±2.5 V dual-supply operation
28 bytes extra nonvolatile memory for user-defined data
100-year typical data retention, TA = 55°C
APPLICATIONS
Mechanical potentiometer replacement
Instrumentation: gain, offset adjustment
Programmable voltage to current conversion
Programmable filters, delays, time constants
Programmable power supply
Low resolution DAC replacement
Sensor calibration
GENERAL DESCRIPTION The AD5231 is a nonvolatile memory,1 digitally controlled
potentiometer2 with 1024-step resolution. The device performs
the same electronic adjustment function as a mechanical poten-
tiometer with enhanced resolution, solid state reliability, and
remote controllability. The AD5231 has versatile programming
that uses a standard 3-wire serial interface for 16 modes of
operation and adjustment, including scratchpad programming,
memory storing and restoring, increment/decrement,
±6 dB/step log taper adjustment, wiper setting readback, and
extra EEMEM for user-defined information, such as memory
data for other components, look-up table, or system identifica-
tion information.
In scratchpad programming mode, a specific setting can be
programmed directly to the RDAC2 register that sets the resis-
tance between Terminals W–A and W–B. This setting can be
stored into the EEMEM and is transferred automatically to the
RDAC register during system power-on.
FUNCTIONAL BLOCK DIAGRAM
CLK
SDI
GND
SDO
RDY02739-0-001
PRFigure 1.
CODE (Decimal)
(D),
(D)
t of Nomi
l (%03684-0-002
Figure 2. RWA (D) and RWB (D) vs. Decimal Code
The EEMEM content can be restored dynamically or through
external PR strobing, and a WP function protects EEMEM con-
tents. To simplify the programming, the linear-step increment
or decrement commands can be used to move the RDAC wiper
up or down, one step at a time. The ±6 dB step commands can
be used to double or half the RDAC wiper setting.
The AD5231 is available in a 16-lead TSSOP. The part is guaran-
teed to operate over the extended industrial temperature range
of −40°C to +85°C.
1 The terms nonvolatile memory and EEMEM are used interchangeably. The terms digital potentiometer and RDAC are used interchangeably.
TABLE OF CONTENTS Specifications.....................................................................................3
Electrical Characteristics—10 kΩ, 50 kΩ, 100 kΩ Versions...3
Timing Characteristics—10 kΩ, 50 kΩ, 100 kΩ Versions.......5
Absolute Maximum Ratings............................................................7
ESD Caution..................................................................................7
Pin Configuration and Function Descriptions.............................8
Typical Performance Characteristics.............................................9
Test Circuits.....................................................................................13
Theory of Operation......................................................................14
Scratchpad and EEMEM Programming..................................14
Basic Operation..........................................................................14
EEMEM Protection....................................................................15
Digital Input/Output Configuration........................................15
Serial Data Interface...................................................................15
Daisy-Chain Operation.............................................................15
Terminal Voltage Operation Range..........................................16
Power-Up Sequence...................................................................16
Latched Digital Outputs............................................................16
Advanced Control Modes.........................................................18
RDAC Structure..........................................................................19
Programming the Variable Resistor.........................................19
Programming the Potentiometer Divider...............................20
Programming Examples............................................................21
Flash/EEMEM Reliability..........................................................21
Applications.....................................................................................23
Bipolar Operation from Dual Supplies....................................23
High Voltage Operation.............................................................23
Bipolar Programmable Gain Amplifier...................................23
10-Bit Bipolar DAC....................................................................23
10-Bit Unipolar DAC.................................................................24
Programmable Voltage Source with Boosted Output............24
Programmable Current Source................................................24
Programmable Bidirectional Current Source.........................25
Resistance Scaling......................................................................25
RDAC Circuit Simulation Model.............................................26
Outline Dimensions.......................................................................27
Ordering Guide..........................................................................27
REVISION HISTORY
9/04—Data Sheet Changed from Rev. A to Rev. B Updated Format..................................................................Universal
Changes to Table 20.........................................................................23
Changes to Resistance Scaling Section.........................................25
Changes to Ordering Guide...........................................................27
5/04—Data Sheet Changed from Rev. 0 to Rev. A Updated formatting............................................................Universal
Edits to Features, General Description, and Block Diagram.......1
Changes to Specifications.................................................................3
Replaced Timing Diagrams..............................................................6
Changes to Pin Function Descriptions...........................................8
Changes to Typical Performance Characteristics..........................9
Changes to Test Circuits.................................................................13
Edits to Theory of Operation.........................................................14
Edits to Applications.......................................................................23
Updated Outline Dimensions........................................................27
12/01—Revision 0: Initial Version SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS VDD = 3 V ± 10% or 5 V ± 10%, VSS = 0 V, VA = VDD, VB = 0 V, −40°C < TA < +85°C, unless otherwise noted.
Table 1.
1 Typicals represent average readings at 25°C and VDD = 5 V. Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. IW ~ 50 µA @ VDD = 2.7 V and IW ~ 400 µA @ VDD = 5 V for the RAB = 10 kΩ
version, IW ~ 50 µA for the RAB = 50 kΩ and IW ~ 25 µA for the RAB = 100 kΩ version (see Figure 26).
3 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = VSS. DNL specification limits of
−1 LSB minimum are guaranteed monotonic operating condition (see Figure 27).
4 Resistor Terminals A, B, and W have no limitations on polarity with respect to each other. Dual-supply operation enables ground-referenced bipolar signal adjustment. Guaranteed by design and not subject to production test.
6 Common-mode leakage current is a measure of the dc leakage from any Terminal B–W to a common-mode bias level of VDD/2. EEMEM restore mode current is not continuous. Current consumed while EEMEM locations are read and transferred to the RDAC register (see Figure 23). To minimize
power dissipation, a NOP Instruction 0 (0x0) should be issued immediately after Instruction 1 (0x1). PDISS is calculated from (IDD × VDD) + (ISS × VSS).
9 All dynamic characteristics use VDD = +2.5 V and VSS = −2.5 V.
TIMING CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS VDD = 3 V to 5.5 V, VSS = 0 V, and −40°C < TA < +85°C, unless otherwise noted.
Table 2. Typicals represent average readings at 25°C and VDD = 5 V.
2 Guaranteed by design and not subject to production test. See timing diagrams (Figure 3 and Figure 4) for location of measured values. All input control voltages are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and timed
from a voltage level of 1.5 V. Switching characteristics are measured using both VDD = 3 V and VDD = 35 V. Propagation delay depends on the value of VDD, RPULL-UP, and CL.
5 Valid for commands that do not activate the RDY pin.
6 RDY pin low only for Instructions 2, 3, 8, 9, 10, and the PR hardware pulse: CMD_2, 3 ~ 20 µs; CMD_8 ~ 1 µs; CMD_9, 10 ~ 0.12 µs. Device operation at TA = −40°C and
VDD < 3 V extends the EEMEM store time to 35 ms. Endurance is qualified to 100,000 cycles per JEDEC Standard 22, Method A117 and measured at −40°C, +25°C, and +85°C; typical endurance at +25°C is 700,000 cycles. Retention lifetime equivalent at junction temperature (TJ) = 55°C per JEDEC Standard 22, Method A117. Retention lifetime based on an activation energy of 0.6 eV
derates with junction temperature, as shown in Figure 45 in the Flash/EEMEM Reliability section.
CPOL = 1t11t1
CLK
B23–MSB
RDY
CPHA = 1
t10
*NOT DEFINED, BUT NORMALLYLSB OF CHARACTER PREVIOUSLY TRANSMITTED.
THE CPOL = 1 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
SDO
SDI02739-0-003
Figure 3. CPHA = 1 Timing Diagram
CLK
CPOL = 0SDOSDI
RDY
*NOT DEFINED, BUT NORMALLY MSB OF CHARACTER PREVIOUSLY RECEIVED.
THE CPOL = 0 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.02739-0-004
Figure 4. CPHA = 0 Timing Diagram
ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted.
Table 3. 1 Maximum terminal current is bounded by the maximum current handling of
the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance. Includes programming of nonvolatile memory.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
CLK
SDI
SDO
VSS
GND
RDY
VDD02739-0-005
Figure 5. Pin Configuration
Table 4. Pin Function Descriptions TYPICAL PERFORMANCE CHARACTERISTICS
CODE(Decimal)
INL ERR
(LSB)
–0.502739-0-006
Figure 6. INL vs. Code, TA = −40°C, +25°C, +85°C Overlay, RAB = 10 kΩ
CODE(Decimal)
DNL E
(LS
–1.502739-0-007
Figure 7. DNL vs. Code, TA = −40°C, +25°C, +85°C Overlay, RAB = 10 kΩ
CODE (Decimal)
R-INL (LS
–0.502739-0-008
Figure 8. R-INL vs. Code, TA = −40°C, +25°C, +85°C Overlay, RAB = 10 kΩ
CODE(Decimal)
R-DNL
(LS02739-0-009
Figure 9. R-DNL vs. Code, TA = −40°C, +25°C, +85°C Overlay, RAB = 10 kΩ
CODE (Decimal)
RHEOSTAT MODE TEMPCO (ppm/°C)
50002739-0-010
Figure 10. (∆RWB/RWB)/∆T × 106
CODE (Decimal)
NTIOME
R MODE
TEMPCO (ppm/°C)
–2002739-0-011
Figure 11. (∆VW/VW)/∆T × 106
CODE(Decimal)256512768102412838464089602739-0-012
Figure 12. Wiper On Resistance vs. Code
TEMPERATURE (°C)
CURRE
NT (Figure 13. IDD vs. Temperature, RAB = 10 kΩ
CLOCK FREQUENCY (MHz)
IDD
(mA)
0.0502739-0-014
Figure 14. IDD vs. Clock Frequency, RAB = 10 kΩ
FREQUENCY(Hz)
–1610k
GAIN
(dB)
100k1M02739-0-015
Figure 15. −3 dB Bandwidth vs. Resistance (Figure 32)
FREQUENCY(kHz)
THD + NOIS
(%)
0.0202739-0-016
Figure 16. Total Harmonic Distortion vs. Frequency
FREQUENCY (Hz)
–501k
GAIN (
100k10k
–1510M02739-0-017
Figure 17. Gain vs. Frequency vs. Code, RAB = 10 kΩ (Figure 32)
FREQUENCY (Hz)
GAIN (
100k10k
–60Figure 18. Gain vs. Frequency vs. Code, RAB = 50 kΩ (Figure 32)
FREQUENCY (Hz)
GAIN
100k10k
–60Figure 19. Gain vs. Frequency vs. Code, RAB = 100 kΩ (Figure 32)
FREQUENCY(Hz)
RR (–dB)02739-0-020
Figure 20. PSRR vs. Frequency
0.5V/DIVFigure 21. Power-On Reset, VA = 2.25 V, VB = 0 V, Code = 1010101010B
TIME (µs)
OUT
2.4502739-0-022
Figure 22. Midscale Glitch Energy, Code 0x200 to 0x1FF
CLK
SDI
IDD20mA/DIV
5V/DIV
5V/DIV
5V/DIV
4ms/DIV02739-0-023
Figure 23. IDD vs. Time when Storing Data to EEMEM
CLK
SDI
IDD*
2mA/DIV
5V/DIV
5V/DIV
5V/DIV
4ms/DIV*SUPPLY CURRENT RETURNS TO MINIMUM POWER CONSUMPTION
IF INSTRUCTION 0 (NOP) IS EXECUTED IMMEDIATELY AFTER
INSTRUCTION 1 (READ EEMEM)
Figure 24. IDD vs. Time when Restoring Data from EEMEM
CODE (Decimal)
THE
TICAL
(mA)
8967686405123841282560Figure 25. IWB_MAX vs. Code
TEST CIRCUITS Figure 26 to Figure 35 define the test conditions used in the specifications.
NC = NO CONNECT02739-0-026
Figure 26. Resistor Position Nonlinearity Error
(Rheostat Operation; R-INL, R-DNL)
V+ =VDD
1LSB =V+/2N02739-0-027
Figure 27. Potentiometer Divider Nonlinearity Error (INL, DNL)
IW
RW=[VMS1–VMS2]/IW02739-0-028
Figure 28. Wiper Resistance
VMS
V+ =VDD±1 0%
PSRR (dB) = 20 LOGVMS∆VDD
()∆VMS%
∆VDD%
PSS (%/%) =Figure 29. Power Supply Sensitivity (PSS, PSRR)
OFFSET BIAS
OFFSET
GNDDUT
VOUT02739-0-030
Figure 30. Inverting Gain
OFFSET
GNDABDUT
VINVOUT02739-0-031
Figure 31. Noninverting Gain
OFFSET
GND
+15V
VIN
VOUT02739-0-032
Figure 32. Gain vs. Frequency
0.1V
VBIAS
RSW=0.1V
A = NC02739-0-033
Figure 33. Incremental On Resistance
NC = NO CONNECT02739-0-034
Figure 34. Common-Mode Leakage Current
200µAIOL
200µAIOH
VOH (MIN)
VOL (MAX)PINCL
50pF
Figure 35. Load Circuit for Measuring VOH and VOL (The diode bridge test
circuit is equivalent to the application circuit with RPULL-UP of 2.2 kΩ)
THEORY OF OPERATION The AD5231 digital potentiometer is designed to operate as a
true variable resistor replacement device for analog signals that
remain within the terminal voltage range of VSS < VTERM < VDD.
The basic voltage range is limited to VDD − VSS < 5.5 V. The
digital potentiometer wiper position is determined by the
RDAC register contents.
The RDAC register acts as a scratchpad register, allowing as
many value changes as necessary to place the potentiometer
wiper in the correct position. The scratchpad register can be
programmed with any position value using the standard SPI
serial interface mode by loading the complete representative
data-word. Once a desirable position is found, this value can be
stored in an EEMEM register. Thereafter, the wiper position is
always restored to that position for subsequent power-up.
The storing of EEMEM data takes approximately 25 ms; during
this time, the shift register is locked, preventing any changes
from taking place. The RDY pin pulses low to indicate the
completion of this EEMEM storage.
The following instructions facilitate the user’s programming
needs (see Table 7 for details):
0. Do nothing.
1. Restore EEMEM content to RDAC.
2. Store RDAC setting to EEMEM.
3. Store RDAC setting or user data to EEMEM.
4. Decrement 6 dB.
5. Decrement 6 dB.
6. Decrement one step.
7. Decrement one step.
8. Reset EEMEM content to RDAC.
9. Read EEMEM content from SDO.
10. Read RDAC wiper setting from SDO.
11. Write data to RDAC.
12. Increment 6 dB.
13. Increment 6 dB.
14. Increment one step.
15. Increment one step.
SCRATCHPAD AND EEMEM PROGRAMMING The scratchpad RDAC register directly controls the position of
the digital potentiometer wiper. For example, when the scratch-
pad register is loaded with all zeros, the wiper is connected to
Terminal B of the variable resistor. The scratchpad register is a
standard logic register with no restriction on the number of
changes allowed, but the EEMEM registers have a program
erase/write cycle limitation (see the Flash/EEMEM Reliability
section).
BASIC OPERATION The basic mode of setting the variable resistor wiper position
(programming the scratchpad register) is accomplished by load-
ing the serial data input register with Instruction 11 (0xB),
Address 0, and the desired wiper position data. When the
proper wiper position is determined, the user can load the serial
data input register with Instruction 2 (0x2), which stores the
wiper position data in the EEMEM register. After 25 ms, the
wiper position is permanently stored in the nonvolatile mem-
ory. Table 5 provides a programming example listing the
sequence of serial data input (SDI) words with the serial data
output appearing at the SDO pin in hexadecimal format.
Table 5. Set and Store RDAC Data to EEMEM Register At system power-on, the scratchpad register is automatically
refreshed with the value previously stored in the EEMEM
register. The factory-preset EEMEM value is midscale, but
it can be changed by the user thereafter.
During operation, the scratchpad (RDAC) register can be
refreshed with the EEMEM register data with Instruction 1
(0x1) or Instruction 8 (0x8). The RDAC register can also be
refreshed with the EEMEM register data under hardware
control by pulsing the PR pin. The PR pulse first sets the wiper
at midscale when brought to logic zero, and then, on the posi-
tive transition to logic high, it reloads the RDAC wiper register
with the contents of EEMEM.
Many additional advanced programming commands are avail-
able to simplify the variable resistor adjustment process (see
Table 7). For example, the wiper position can be changed one
step at a time using the increment/decrement instruction or by
6 dB with the shift left/right instruction. Once an increment,
decrement, or shift instruction has been loaded into the shift
register, subsequent CS strobes can repeat this command.
