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AD5228BUJZ100-RL7 |AD5228BUJZ100RL7ADN/a6000avai32-Position Manual Up/Down Control Potentiometer
AD5228BUJZ10-RL7 |AD5228BUJZ10RL7ADIN/a804avai32-Position Manual Up/Down Control Potentiometer
AD5228BUJZ50-R2 |AD5228BUJZ50R2ADN/a540avai32-Position Manual Up/Down Control Potentiometer
AD5228BUJZ50-RL7 |AD5228BUJZ50RL7ADN/a3595avai32-Position Manual Up/Down Control Potentiometer
AD5228BUJZ50-RL7 |AD5228BUJZ50RL7ANALOGN/a10avai32-Position Manual Up/Down Control Potentiometer


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AD5228BUJZ100-RL7-AD5228BUJZ10-RL7-AD5228BUJZ50-R2-AD5228BUJZ50-RL7
32-Position Manual Up/Down Control Potentiometer
32-Position Manual Up/Down Control
Potentiometer

Rev. 0
FEATURES
32-position digital potentiometer
10 kΩ, 50 kΩ, 100 kΩ end-to-end terminal resistance
Simple manual up/down control
Self-contained, requires only 2 pushbutton tactile switches
Built-in adaptive debouncer
Discrete step-up/step-down control
Autoscan up/down control with 4 steps per second
Pin-selectable zero-scale/midscale preset
Low potentiometer mode tempco, 5 ppm/°C
Low rheostat mode tempco, 35 ppm/°C
Digital control compatible
Ultralow power, IDD = 0.4 µA typ and 3 µA max
Low operating voltage, 2.7 V to 5.5 V
Automotive temperature range, −40°C to +105°C
Compact thin SOT-23-8 (2.9 mm × 3 mm) Pb-free package
APPLICATIONS
Mechanical potentiometer and trimmer replacements
LCD backlight, contrast, and brightness controls
Digital volume control
Portable device-level adjustments
Electronic front panel-level controls
Programmable power supply
GENERAL DESCRIPTION

The AD5228 is Analog Devices’ latest 32-step-up/step-down
control digital potentiometer emulating mechanical potenti-
ometer operation1. Its simple up/down control interface allows
manual control with just two external pushbutton tactile
switches. The AD5228 is designed with a built-in adaptive
debouncer that ignores invalid bounces due to contact bounce
commonly found in mechanical switches. The debouncer is
adaptive, accommodating a variety of pushbutton tactile
switches that generally have less than 10 ms of bounce time
during contact closures. When choosing the switch, the user
should consult the timing specification of the switch to ensure
its suitability in an AD5228 application. The terms digital potentiometer and RDAC are used interchangeably.
FUNCTIONAL BLOCK DIAGRAM

PUSH-UPBUTTONA
Figure 1.
The AD5228 can increment or decrement the resistance in
discrete steps or in autoscan mode. When the PU or PD button
is pressed briefly (no longer than 0.6 s), the resistance of the
AD5228 changes by one step. When the PU or PD button is held
continuously for more than a second, the device activates the
autoscan mode and changes four resistance steps per second.
The AD5228 can also be controlled digitally; its up/down
features simplify microcontroller usage. The AD5228 is available
in a compact thin SOT-23-8 (TSOT-8) package. The part is
guaranteed to operate over the automotive temperature range of
−40°C to +105°C.
The AD5228’s simple interface, small footprint, and very low
cost enable it to replace mechanical potentiometers and
trimmers with typically 3× improved resolution, solid-state
reliability, and faster adjustment, resulting in considerable cost
saving in end users’ systems.
Users who consider EEMEM potentiometers should refer to the
recommendations in the Applications section.
Table 1. Truth Table
RWA increments if RWB decrements and vice versa.
TABLE OF CONTENTS
Electrical Characteristics.................................................................3
Interface Timing Diagrams.........................................................4
Absolute Maximum Ratings............................................................5
ESD Caution..................................................................................5
Pin Configuration and Function Descriptions.............................6
Typical Performance Characteristics.............................................7
Theory of Operation......................................................................11
Programming the Digital Potentiometers...............................12
Controlling Inputs......................................................................13
Terminal Voltage Operation Range..........................................13
Power-Up and Power-Down Sequences..................................14
Layout and Power Supply Biasing............................................14
Applications.....................................................................................15
Manual Adjustable LED Driver................................................15
Adjustable Current Source for LED Driver............................15
Automatic LCD Panel Backlight Control................................16
Audio Amplifier with Volume Control...................................16
Constant Bias with Supply to Retain Resistance Setting......17
Outline Dimensions.......................................................................18
Ordering Guide..........................................................................18
REVISION HISTORY

Revision 0: Initial Version
ELECTRICAL CHARACTERISTICS
10 kΩ, 50 kΩ, 100 kΩ versions: VDD = 3 V ± 10% or 5 V ± 10%, VA = VDD, VB = 0 V, −40°C < TA < +105°C, unless otherwise noted.
Table 2.

Footnotes on next page.
Typicals represent average readings at 25°C, VDD = 5 V.
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V. Guaranteed by design and not subject to production test.
5 DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. Resistor Terminals A, B, and W have no limitations on polarity with respect to each other. PU and PD have 100 kΩ internal pull-up resistors, IDD_ACT = VDD/100 kΩ + IOSC (internal oscillator operating current) when PU or PD is connected to ground.
8 PDISS is calculated based on IDD_STBY × VDD only. IDD_ACT duration should be short. Users should not hold PU or PD pin to ground longer than necessary to elevate power
dissipation. Bandwidth, noise, and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest
bandwidth. The highest R value results in the minimum overall power consumption. All dynamic characteristics use VDD = 5 V.
11 Note that all input control voltages are specified with tR = tF = 1 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V. Switching characteristics are measured
using VDD = 5 V. The debouncer keeps monitoring the logic-low level once PU is connected to ground. Once the signal lasts longer than 11 ms, the debouncer assumes the last
bounce is met and allows the AD5228 to increment by one step. If the PU signal remains at low and reaches tAS_START, the AD5528 increments again, see Figure 7. Similar
characteristics apply to PD operation.
INTERFACE TIMING DIAGRAMS

04422-0-004RWB
Figure 2. Increment RWB in Discrete Steps
RWB
Figure 3. Increment RWB in Autoscan Mode
RWB
Figure 4. Decrement RWB in Discrete Steps
RWB
Figure 5. Decrement RWB in Autoscan Mode
ABSOLUTE MAXIMUM RATINGS
Table 3.


1 Maximum terminal current is bounded by the maximum applied voltage
across any two of the A, B, and W terminals at a given resistance, the
maximum current handling of the switches, and the maximum power
dissipation of the package. VDD = 5 V.
2 Package power dissipation = (TJmax – TA) / θJA.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
VDD
PRE
Figure 6. SOT-23-8 Pin Configuration
Table 4. Pin Function Descriptions

TYPICAL PERFORMANCE CHARACTERISTICS
032282420161284

CODE (Decimal)
EOSTA
IN
L (
Figure 7. R-INL vs. Code vs. Supply Voltages
032282420161284

CODE (Decimal)
RHEOSTAT MODE INL (LSB)
Figure 8. R-INL vs. Code vs. Temperature, VDD = 5 V
032282420161284

CODE (Decimal)
RHE
TAT MODE
DNL (LS
Figure 9. R-DNL vs. Code vs. Supply Voltages
032282420161284

CODE (Decimal)
RHE
TAT MODE
DNL (LS
Figure 10. R-DNL vs. Code vs. Temperature, VDD = 5 V
032282420161284

CODE (Decimal)
NTIOME
R MODE
INL (LS
Figure 11. INL vs. Code vs. Supply Voltages
032282420161284

CODE (Decimal)
NTIOME
R MODE
INL (LS
Figure 12. INL vs. Code, VDD = 5 V
032282420161284
CODE (Decimal)
NTIOME
R MODE
DNL (LS
Figure 13. DNL vs. Code vs. Supply Voltages
032282420161284

CODE (Decimal)
NTIOME
R MODE
DNL (LS
Figure 14. DNL vs. Code, VDD = 5 V
–40–20020406010080

TEMPERATURE (°C)
FSE (
Figure 15. Full-Scale Error vs. Temperature
–40–20020406010080

TEMPERATURE (°C)
ZSE (
Figure 16. Zero-Scale Error vs. Temperature
0.1–40–20020406010080

TEMPERATURE (°C)
ANDBY
CURRE
NT (
Figure 17. Supply Current vs. Temperature
–40–20020406010080

TEMPERATURE (°C)
NOMINAL RE
ANCE
(k
Figure 18. Nominal Resistance vs. Temperature
–40–20020406010080
TEMPERATURE (°C)
WIP
RE
ANCE
, R
Figure 19. Wiper Resistance vs. Temperature
12048121620242832

CODE (Decimal)
RHEOSTAT MODE TEMPCO,
T (ppm/

Figure 20. Rheostat Mode Tempco ∆RWB/∆T vs. Code
–1048121620242832

CODE (Decimal)
NTIOME
R MODE
TE
CO,
T (ppm/

°C)
Figure 21. Potentiometer Mode Tempco ∆VWB/∆T vs. Code
–1210k1M
START 1 000.000HzSTOP 1 000 000.000Hz
REF LEVEL0dB6.0dBMAG (A/R)–8.966dB
100k

GAIN (
Figure 22. Gain vs. Frequency vs. Code, RAB = 10 kΩ
–1210k1M
START 1 000.000HzSTOP 1 000 000.000Hz
REF LEVEL0dB6.0dBMAG (A/R)–9.089dB
100k

GAIN (
Figure 23. Gain vs. Frequency vs. Code, RAB = 50 kΩ
–1210k1M
START 1 000.000HzSTOP 1 000 000.000Hz
REF LEVEL0dB6.0dBMAG (A/R)–9.123dB
100k

GAIN (
Figure 24. Gain vs. Frequency vs. Code, RAB = 100 kΩ
1001k10k100k1M
FREQUENCY (Hz)
RR (dB)
Figure 25. PSRR
Figure 26. Basic Increment
Figure 27. Repetitive Increment
Figure 28. Autoscan Increment
032282420161284

CODE (Decimal)
THE
TICAL I
(mA)
Figure 29. Maximum IWB vs. Code
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