AD5222BR50 Fast Delivery |IC PHOENIX CO.,LIMITED

AD5222BR50 ,Increment/Decrement Dual Digital PotentiometerSpecifications subject to change without notice.REV. 0–2–AD5222ABSOLUTE MAXIMUM RATINGS ORDERING GU ..
AD5227BUJ100-RL7 ,64-Position Digital Up/Down Control PotentiometerApplications section. power-up. When CS is enabled, the devices changes step at Table 1. Truth Tabl ..
AD5227BUJ10-RL7 ,64-Position Digital Up/Down Control PotentiometerFEATURES FUNCTIONAL BLOCK DIAGRAM V64-position digital potentiometer DD10 kΩ, 50 kΩ, 100 kΩ end-to- ..
AD5227BUJ50-RL7 ,64-Position Digital Up/Down Control PotentiometerGENERAL DESCRIPTION The AD5227 is Analog Devices’ latest 64-step up/down control The AD5227 is avai ..
AD5227BUJZ100-RL7 ,64-Position Digital Up/Down Control PotentiometerSpecifications subject to change without notice. No license is granted by implication www.analog.c ..
AD5227BUJZ10-R2 ,64-Position Digital Up/Down Control PotentiometerCharacteristics 7 Adjustable Current Source for LED Driver . 12 Theory of Operation ....... 10 Aut ..
AD8842AR ,8-Bit Octal, 4-Quadrant Multiplying, CMOS TrimDACSPECIFICATIONS(V = +5 V, V = –5 V, All V x = +3 V, T = –40°C to +85°C, unless otherwise noted.)ELEC ..
AD8842ARZ ,8-Bit Octal, 4-Quadrant Multiplying, CMOS TrimDACSpecifications subject to change without notice.–2– REV. 0AD88421SDI A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 ..
AD890JP ,V(cc): +-7.5V; precision, wideband channel processing element. For high performance disk subsystem useSPECIFICATIONS (@ +2IPil and t5 y de, unless otherwise noted) Parameter Conditions VARIABL ..
AD890JQ ,V(cc): +-7.5V; precision, wideband channel processing element. For high performance disk subsystem useSpecifications in boldface are tested on all production units at fiaal electrical test. Results fro ..
AD890JQ ,V(cc): +-7.5V; precision, wideband channel processing element. For high performance disk subsystem useFEATURES An 80 MHz Bandwidth Permitting a so Mbls Data Transfer Rate A Variable Gain Amplifi ..
AD891JP ,RIGID DISK DATA CHANNEL QUALIFIERSPECIFICATIONS Propagation Delay 20 mV Overdrive 200 mV Overdrive ns Comparator Mismatch 30 ..

AD5222BR50
Increment/Decrement Dual Digital Potentiometer
REV.0
Increment/Decrement
Dual Digital Potentiometer
FUNCTIONAL BLOCK DIAGRAM
FEATURES
128-Position, 2-Channel
Potentiometer ReplacementkV, 50kV, 100kV, 1MV
Very Low Power: 40 mA Max
62.7 V Dual Supply Operation or
2.7 V to 5.5 V Single Supply Operation
Increment/Decrement Count Control
APPLICATIONS
Stereo Channel Audio Level Control
Mechanical Potentiometer Replacement
Remote Incremental Adjustment Applications
Instrumentation: Gain, Offset Adjustment
Programmable Voltage-to-Current Conversion
Line Impedance Matching
GENERAL DESCRIPTION
The AD5222 provides a dual channel, 128-position, digitally
controlled variable-resistor (VR) device. This device performs
the same electronic adjustment function as a potentiometer or
variable resistor. These products were optimized for instrument
and test equipment push-button applications. Choices between
bandwidth or power dissipation are available as a result of the
wide selection of end-to-end terminal resistance values.
The AD5222 contains two fixed resistors with wiper contacts that
tap the fixed resistor value at a point determined by a digitally
controlled up/down counter. The resistance between the wiper
and either end point of the fixed resistor provides a constant
resistance step size that is equal to the end-to-end resistance
divided by the number of positions (e.g., RSTEP = 10kW/128 =W). The variable resistor offers a true adjustable value of
resistance, between Terminal A and the wiper, or TerminalB
and the wiper. The fixed A-to-B terminal resistance of 10kW,kW, 100kW, or 1MW has a nominal temperature coefficient
of –35 ppm/°C.
The chip select CS, count CLK and U/D direction control inputs
set the variable resistor position. The MODE determines whether
both VRs are incremented together or independently. With
MODE at logic zero, both wipers are incremented UP or DOWN
without changing the relative settings between the wipers. Also,
the relative ratio between the wipers is preserved if either wiper
reaches the end of the resistor array. In the independent MODE
(Logic1) only the VR determined by the DACSEL pin is changed.
DACSEL (Logic 0) changes RDAC 1. These inputs, which con-
trol the internal up/down counter, can be easily generated with
mechanical or push-button switches (or other contact closure
devices). This simple digital interface eliminates the need for
microcontrollers in front panel interface designs.
The AD5222 is available in the surface-mount (SO-14) package.
For ultracompact solutions, selected models are available in the
thin TSSOP-14 package. All parts are guaranteed to operate
over the extended industrial temperature range of –40°C to
+85°C. For 3-wire, SPI-compatible interface applications, see
the AD5203/AD5204/AD5206, AD7376, and AD8400/AD8402/
AD8403 products.
Figure 1.Typical Push-Button Control Application
AD5222–SPECIFICATIONS
(VDD = 3 V 6 10% or 5 V 6 10%, VSS = 0 V, VA = +VDD, VB = 0 V, –408C < TA < +858C,
unless otherwise noted.)
DC CHARACTERISTICS RHEOSTAT MODE (Specifications Apply to All VRs)
RESISTOR TERMINALS
INTERFACE TIMING CHARACTERISTICS (Applies to All Parts)
NOTES
1Typicals represent average readings at 25°C, VDD = 5 V.Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions.
R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Figure 22 test circuit.Wiper resistance is not measured on the RAB = 1 MW models.
4INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0V. DNL
specification limits of –1 LSB maximum are guaranteed monotonic operating conditions. See Figure 21 test circuit.
5Resistor Terminals A, B, W have no limitations on polarity with respect to each other.Guaranteed by design and not subject to production test.
7PDISS is calculated from (IDD · VDD). CMOS logic level inputs result in minimum power dissipation.
ABSOLUTE MAXIMUM RATINGS
(TA = 25°C, unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +7 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, –5 V
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
VA, VB, VW to GND . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, VDD
AX – BX, AX – WX, BX – WX . . . . . . . . . . . . . . . . . . . –20 mA
Digital Input Voltage to GND . . . . . . . . . . . . 0 V, VDD + 0.3 V
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Maximum Junction Temperature (TJ max) . . . . . . . . . . 150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
Package Power Dissipation . . . . . . . . . . . . . (TJ max – TA)/qJA
Thermal Resistance qJA,
SOIC (SO-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158°C/W
TSSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
Figure 2. Detail Timing Diagram
Truth Table
Common Mode (MODE = 0) moves both wipers together either
UP or DOWN the resistor array without changing the relative
distance between the wipers. Also, the distance between both
wipers is preserved if either reaches the end of the array. Inde-
pendent Mode (MODE = 1) allows user to control each RDAC
individually: DACSEL = 0 sets RDAC1; DACSEL = 1: sets
RDAC2.
ORDERING GUIDE
The AD5222 die size is 56 mil · 60 mil, 3360 sq. mil; 1.4224 mm · 1.524 mm,
2.1677 sq. mm. Contains 1503 transistors. Patent Number 5495245 applies.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
CLK
U/D
GND
VDD
DACSEL
MODE
VSS
PERCENT OF NOMINAL
END-TO-END RESISTANCE – % R
CODE – Decimal
Figure 3.Wiper-To-End Terminal Resistance vs. Code
IWA CURRENT – mA34567
VOLTAGE – V
Figure 4.Resistance Linearity vs. Conduction Current

WIPER RESISTANCE – V
FREQUENCY4042474850515354604445565759
150
Figure 5.Wiper Contact Resistance
AD5222–Typical Performance Characteristics
Figure 6.R-DNL Relative Resistance Step Position
Change vs. Code
Figure 7.R-INL Resistance Nonlinearity Error vs. Code
Figure 8.Potentiometer Divider INL Error vs. Code
CODE – Decimal
POTENTIOMETER MODE TEMPCO – ppm/48648096112
–20
Figure 9.DVWB/DT Potentiometer Mode Tempco
CODE – Decimal
RHEOSTAT MODE TEMPCO – ppm/48648096112
–60
Figure 10.DRWB/DT Rheostat Mode Tempco
FREQUENCY – Hz
–501M
GAIN - dB–30
1001k10k100k
10M
Figure 11.10 kW Gain vs. Frequency vs. Code
Figure 12.Gain vs. Frequency vs. RAB
Figure 13.Total Harmonic Distortion Plus Noise vs.
Frequency

Figure 14.Normalized Gain Flatness vs. Frequency
AD5222
FREQUENCY – Hz
120010M
IDD
– SUPPLY CURRENT –
10k100k1M
CODE = 15H
CODE = 15H
CODE = 3FH
CODE = 3FH
Figure 15.IDD, ISS Supply Current vs. Clock Frequency
COMMON MODE – Volts
SWITCH RESISTANCE –
100–10123456
Figure 16.Incremental Wiper Contact Resistance vs.
VDD/VSS
TEMPERATURE – 8C
SUPPLY CURRENT – mA
0.013560
Figure 17.Supply Current vs. Temperature
Figure 18.Supply Current vs. Input Logic Voltage

Figure 19.Midscale Transition 3FH to 40H

20mV/DIV
VWA
VWB
CLK
2V/DIV
Figure 20.Stereo Step Transition, Mode = 0

Partno	Mfg	Dc	Qty	Available	Descript
AD5222BR50	ADI	N/a	2	avai	Increment/Decrement Dual Digital Potentiometer