AD521JD ,Integrated Circuit Precision Instrumentation AmplifierFEATURES
Programmable Gains hom 0.1 to 1000
Differential Inputs
Hlgtt CMRR: 110dB min
L ..
AD521KD ,Integrated Circuit Precision Instrumentation AmplifierFEATURES
Programmable Gains hom 0.1 to 1000
Differential Inputs
Hlgtt CMRR: 110dB min
L ..
AD521LD ,Integrated Circuit Precision Instrumentation AmplifierANALOG
DEVICES
Integrated Circuit
Precision Instrumentation Amplifier
AD521SD ,Integrated Circuit Precision Instrumentation AmplifierFEATURES
Programmable Gains hom 0.1 to 1000
Differential Inputs
Hlgtt CMRR: 110dB min
L ..
AD5220BR10 ,Increment/Decrement Digital PotentiometerCHARACTERISTICS Applies to All PartsInput Clock Pulsewidth t , t Clock Level High or Low 25 nsCH CL ..
AD5220BRM10 ,Increment/Decrement Digital Potentiometerapplications. A choice betweenbandwidth or power dissipation are available as a result of thewide s ..
AD8802AN ,12 Channel, 8-Bit TrimDACs with Power ShutdownCHARACTERISTICSInput Clock Pulse Width t , t Clock Level High or Low 15 nsCH CLData Setup Time t 5n ..
AD8802AN ,12 Channel, 8-Bit TrimDACs with Power ShutdownSpecifications apply to all DACsResolution N 8 BitsDifferential Nonlinearity Error DNL Guaranteed M ..
AD8802AR ,12 Channel, 8-Bit TrimDACs with Power ShutdownGENERAL DESCRIPTIONGND VRSREFLThe 12-channel AD8802/AD8804 provides independent digitally-(AD8802 O ..
AD8802ARU ,12 Channel, 8-Bit TrimDACs with Power ShutdownAPPLICATIONSO9REGAutomatic Adjustment O10SDI DD0O11Trimmer ReplacementD7 DACO1212Video and Audio Eq ..
AD8803 ,Octal 8-Bit TrimDAC with Power Shutdown & Mid-Scale Presetapplications ideallyallel shift register that is loaded from a standard three-wire serialsuited for ..
AD8803AR ,Octal 8-Bit TrimDAC with Power ShutdownSpecifications Apply to All DACsResolution N 8 BitsIntegral Nonlinearity Error INL –1.5 ±1/2 +1.5 ..
AD521-AD521JD-AD521KD-AD521LD-AD521SD
Integrated Circuit Precision Instrumentation Amplifier
Cy ANALOG
Integrated Circuit
DEVKES Precision Instrumentation Amplifier
FEATURES
Ptogrammahte Gains fmm 0.1 to 1000
Differential Inputs
High CMRR: 11MB min
Low Drift: ZquC max (L)
Complete Input Protection, Pow ON and Power OFF
Funetiondly Complete with the Addition of Two Resistors
Imcmelly Compensated
Gain Bandwidth Product: 40Ml-lz
Output Cumin: Limited: 2thttA .
Voty Low Noise: 0.6uV p-p,0.1Hzto10Hz, RTI o G " 1000
Chlps are Available
PRODUCT DESCRIPTION
The A0521 is a second generation, low cost, monolithic 1C
instrumentation amplifier developed by Analog Devices. As a
true instrumentation amplifier, the AD521 is a gain block with
differential inputs and an accurately programmable input/
output gain relationship.
The ADS21 1C instrumentation amplifier should not be con-
fused with an operational amplifier, although several manu-
facturers (including Analog Devices) offer op amps which can
be used as building blocks in variable gain instrumentation
amplifier circuits. Op amps are general-putpose components
which, when used with precision-matched external resistors,
can perform the instrumentation tunplifier function.
An instrumentation amplifier is a precision differential volt-
age gain device optimized for operation in a real world envi-
ronment, and is intended to be used wherever acquisition of a
useful signal is difficult. It is characterized by high input im-
pedance, balanced differential inputs, low bias currents end
high CMR.
As a complete instrumentation amplifier. the AD521 requires
only two resistors to set its gain to any value between 0.1 and
1000. The ratio matching of these resistors doei not affect the
high CMRR (up to 120dB) or the high input impedance (3 X
109 m of the AD521. Furthermore, unlike most operational
amplifier-based instrumentation amplifiers, the inputs are
protected against overvoluges up to AIS volts beyond the
supplies.
The AD521 lC instrumentation amplifier is available in four
different versions of accuracy and operating temperature range.
The economical "J " grade, the low drift "K" grade, and the
lower drift, higher linearity "L" grade are specified from o to
PIN CONFIGURATION
omoTLL " L,,
(mg 2 " guts
'INNTE " SENSE
”§§ng 1052 " REF
V- fir " SCALE
''Wl, o a COMP. R
OUTPUTIT a v+
+70°C. The “S” grade guarantees performance to spet;ification
over the extended tempenture range: -5 fc to +125°C.
PRODUCT HIGHLIGHTS
1. The AD521 is a true instrumentation amplifier in integrated
circuit form, offering the user performance comparable to
many modular instrumentation amplifiers at a fraction of
the cost.
2. The AD521 has low guaranteed input offset voltage drift
(251fo for L grade) and low noise for precision, high gain
applications.
3. The AD521 is functionally complete with the addition of
two resistors. Gain can be preset from 0.1 to more than
4. The AD521 is fully protected for input levels up to IW
beyond the supply voltages and 30V differential at the
inputs.
s. Internally compensated for all gains, the ADS 21 also offers
the user the provision for limiting bandwidth.
6 Offset nulling can be achieved with " optional trim pot.
7. The AD521 offers superior dynamic performance with a
gain-bandwidth product of 40MHz, full peak response of
lOOkHz (independent of gain) and a settling time of Sp:
to 0.1% of a 10V step.
A0521 --SPEtlFlth'rMG (typical @ ll, = t1lill, ttt = 2m and T, tra. +25%: unless otherwise specified)
MODEL A052!!!) ADSZIKD A0521“) (ADSZIID/ull)
GAIN . . .
amp (For Seeeified Operation, Note 1) t (01000 .
mm G '. M/xcwv . . .
Error from Equuion (zozs-ooowm . .
Nttrtlineathy (Note 2) . .
)<0<1000 . 0.2% max . P'' max
Gain Tmtun Coeeteient " to.osmprmfc 1(15 £0.46ch
OUTPUT CHARACTERISTICS
Rated oupm ttov, 21m min . ' .
Output " Maximum Openlin. Temmuzn ttOV 0 Sum min . . .
lmpedmce o.tn . o .
DYNAMIC RESPONSE
Small SW llndwidlh (8343)
G " I >2MH2 . . .
G " 10 loom: . . .
G . 100 zoom: . . .
G " 1000 40m: . . .
Smdl Sinai, Al ou Flame“
G . 1 15m: . . .
G " 10 26kth . . .
G . too um: . . .
G . moo . 6km . . .
Full Peak Response (Note " 100qu . . .
saw m.1
Scaling Time (my 10V sup " within MhnV of Final Vibe)
G I l ms o o a
G I 10 ’55 o . .
G " 100 10p: . . .
G " I000 mu . . .
Diffcmuial Ooerlad Rummy (230V Input to within
lOmV of Final Whse) (Note 4)
G " 1000 son. . . .
Common Mode Step Rummy (30V Input to within
lOmV of Find Value) (Note "
G I 1000 tpits t t o
VOLTAGE OFFSET (my be nulled) ..
Input Ofhet voltage tvosp 3mV mu 12mV typ) t3mV max (0.5mV , LOmV m (0.5mV typ) .
vs. Tempmmn Isuvfc mu miv/c typ) suvfc mu (Lsuv c typ) fuvl'c mu :
MB. Supply JuVM .
mm! Offm Voltage (V050) 400an mu t200mV ty ) 200mV mu (JOmV ) MNhttht Inn "
vs. Temperature muvfc Inn 'li'lG% typ) lsopvfc mu (souv C W) nspfc mu "
n. Supply (Non o) o.oosvo.°m . . .
INPUT CURRENTS
Input Bias Current (either input) m m" 4011A mu .. "
",Ternpemture lMl'Cn-ux SOOPAmeu .. "
VI, Supply 2w . . .
lnpm Offm Current 20nA mu MMA mu " ..
".Tempesture 250;»me lZSpA/Cmu " ..
Manda ttttnn tmpedutee (Note 7) a x to,'pti.trrr . . .
Common Mode Input Impedance (Note 8) 6 x 1o"ttts.ier . . .
[ml Voltage Range for specified Pufonmnce
(with respect to ground) 110V . o .
Maximum Voltage without Dump to Unit. Pow ON
or OFF Differential Mode (Note 9) 30V . o .
Voltage u either input (Note 9) Vs tlSV . . .
Common Mode Reieetion Ratio, DC to 60": with tkit
noun: unbnhnce
G . 1 70d! min (74dB tnt) 74dB min (8043 typ) .. u
G . to 9MB nip (9MB typ) 94dB min (IOOdB typ) " ..
G I 100 100d! mm (104d! typ) tMdB min (1 “dB lyp) u ..
c " moo lOOdB min " man typl nods min mods typ) .. " _-..---
Voltage RTO lpm) o 0.)“: m 10H: (Note 10) Jgusgg'. . g,gley . . .
RMS RTO, 10H: to Wk": (1.26) o (50) tN . . .
Input Current. mu, 10": to lokHz 159A (mu) . . . _--.--
REFERENCE TERMINAL
Bias Cumm suA . . .
Input Resistance mm o o .
Voltage lung: nov . o .
Gain to Output 1 . . . _-.--.-"-
POWER SUPPLY
Openu'n. Volugg Range MV to ttttV . .
Quincem Supply Current SmA mu . . _.,.-.--'"
TEMPERATURE RANGE c
Speeified Perform: 0 to do'c . . "fc to .tt'2.
09mm -2s:c " as’g . . -sfc to ~11
stumge -os Cumsoc . . . __-,...-----
'seeMeseiem. Inc " ADSIUD.
"Wanda: Inn: " ADSZIKD.
Spamming more! m M without nodes.
Applying the A0521
NOTES,
1. Gains below 1 and above 1000 are obtained by simply ad-
justing the gain setting resistors. (Input voltage should be re-
stricted to t10V for gains equal to or less than I.)
2. Nonlinearity is defined as the ratio of the deviation from
the "best straight line" through a full scale output range of
fd volts. With a combination of high gain and AIO volt output
swing. distortion may increase to as much as 0.3%.
3. Full Peak Response is the frequency below which a typical
amplifier will produce full output swing.
4. Differential Overload Recovery is the time it takes the ampli-
fier to recover from a pulsed 30V differential input with 15V
of common mode voltage, to within lOmV of final value. The
test input is a 30V. Iota pulse at a lkl-lz rate. (When a differ-
ential signal of greater than 11V is applied between the inputs,
transistor clamps are activated which drop the excess input
voltage across internal input resistors. If a continuous overload
is maintained, power dissipated in these resistors causes temper-
ature gradients and a corresponding change in offset voltage,
as well as added thermal time constant, but will not damage
the device.)
5. Common Mode Step Recovery is the time it takes the amp-
Mer to recover from a 30V common mode input with zero
volts of differential signal to within lOmV of final value. The
test input is 30V, 10ps pulse at a lkHz rate. (When a com-
mon mode signal greater than Vs -0.SV is applied to the
inputs, transistor clamps are activated which drop the excessive
input voltage across internal input resistors. Power dissipated
in these resistors causes temperature gradients and a correspon-
ding change in offset voltage, as well " an added thermal time
constant, but will not damage the device.)
6. Output Offset Voltage versus Power Supply includes a
constant 0.005 times the unnulled output offset per percent
change in either power supply. If the output offset is nulled,
the output offset change versus supply change is substantially
reduced.
7. Differential Input Impedance is the impedance between the
two inputs.
8. Common Mode Input Impedance is the impedance from
either input to the power supplies.
9. Maximum Input Voltage (differential or at either input) is
30V when using 115V supplies. A more general specification is
that neither input may exceed either supply (even when
Vs = 0) by more than 15V and that the difference between the
two inputs must not exceed 30V. (See also Notes 4 and 5 .)
10. 0.1Hz to 10Hz Peak-to-Peak Voltage Noise is defined "
the maximum peak-to-peak voltage noise ovserved during 2
of 3 separate 10 second periods with the test circuit of Fig-
ure 8.
ORDERING GUIDE
Temperature Package
Model Range Description Option'
AD52 lJD 0°C to +70°C 14-Pin Ceramic DIP D-l4
ADSZIKD 0°C to +70°C l4-Pin Ceramic DIP 13-14
ADSZILD 0°C to +70°C 14-Pin Ceramic DIP D-l4
ADSZISD -55°C to + 125''C l4-Pin Ceramic DIP D-l4
AD521SD/883B2 -55''C to + 125°C l4-Pin Ceramic DIP D-l4
AD521] Chips 0°C to +70°C Die
ADSZIK Chips 0"C to +70°C Die
ADSZIS Chips -55''C to + 125°C Die
lFor outline information see Package Information section.
szndard military drawing available.
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
SENSE tt SCALE
DESIGN PRINCIPLE
Figure 1 is a simplified schematic of the A0521. A differential
input voltage, Wo appears across RC causing an imbalance in
the currents through Qt and Q2, A1=VINIRG. That imbalance
is forced to flow in Rs because the collector currents of Q3
and Q4 are constrained to be equal by their biasing (current
mirror). These conditions can only be satisfied if the differen-
tial voltage across Rs (and hence the output voltage of the
AD521) is equal to Al X Rs. The feedback amplifier, AFB
performs that function. Therefore, VOUT I v-l-C- X Rs or
-./ . - ty
on ten - a
'" OUT
AI IIF
ti) I I,,,,,,,,, o,,,,,,','" l If' 'lr
Figure h SimplifiedA0521 Schematic
APPLICATION NOTES FOR THE A0521
These notes ensure the AD521 will achieve the high level of
performance necessary for many diversified IA applications.
I. Gains below 1 are realized by adjusting the gain setting
resistors as shown in Figure 2 (the resistor, R5 between
pins 10 and 13 should remain 1ooki2 115%, see application
note 3). For best results, the input voltage should be re-
stricted to 110V even though the gain may be less than 1.
See Figure 6 for gains above 1000.
2. Provide a return path to ground for input bias currents. The
AD521 is an instrumentation amplifier, not an isolation
amplifier. When using a thermocouple or other "floating"
source, this return path may be provided directly to ground
or indirectly through a resistor to ground from pins 1 and/
or 3, as shown in Figure 3. If the return path is not pro-
vided, bias currents will cause the output to saturate. The
value of the resistor may be determined by dividing the
maximum allowable common mode voltage for the appli-
cation by the bias current of the instrumentation amplifier.
3. The resistors between pins 10 and 13, (RSCALE) must equal
1ookt2 115% (Figure 2). If RSCALE is too low (below 85kn)
the output swing of the A0521 is reduced. At values below
80kS2 and above 120kR the stability of the ADSZI may be
impaired. m,
4. Do not exceed the allowable input signal range. The line
arity of the AD521 decreases if the inputs are driven within
5 volts of the supply rails, particularly when the device is
used at a gain less than I. To avoid this possibility, atten-
uate the input signal through a resistive divider network and
use the ADS21 as a buffer, " shown in Figure 4. The reds.
tor Rl2 matches the impedance teen by both AD521 in-
puts so that the voltage offset caused by bias currents will
be minimized.
5. Use the compensation pin (pin 9) and the applicable com-
pensation circuit when the amplifier is required to drive a
capacitive load. It is worth mentioning that coaxial cables
can ".invisibly" provide such capacitance since many popu-
lar coaxial cables display capacitance in the vicinity of 30pF
per foot.
This compensation (bandwidth control) feature permits the
user to fit the response of the AD521 to the particular appli-
cation " illustrated by Figure 5. In cases of extremely high
load capacitance the compensation circuit may be changed
" follows..
1. Reduce 68052 to 249
2. Reduce 3309 to 7.stt
3. Increase lOOOpF to 0.1pF
4. Set Cx to lOOOpF if no compensation was originally
used. Otherwise, do not alter the original value.
This allows stable operation for load capacitance: up to
3000pF, but limits the slew rate to approximately 0.16V/us;
6. Signals having frequency components above the Instrumen'
tation Amplifier's output amplifier closed-loop bandwidth
will be transmitted from V- to the output with little or no
attenuation. Therefore, it is advisable to decouple the v-
supply line to the output common or to pin 11.I
Noun (Re)
Att o--:
MIN VALUE or "
e , m0
to 10:9
too tttt
woo “m
F igure 2. Operating Connections for A0527
I For further details, refer to "An LC. User's Guide to Decoupling,
Grounding, and Making Things Go Right for I Change," by A. ites
Paul Brokaw. This application note is available from Analog
without charge upon request.
c). AC Coupled, Indirect Return
Figure 3. Ground Returns for "Floating" Transducers
1. IWM TT"tett1lPaAmLtrrBYR
DIWDIH " tt
2. Imam m " BMW IN
mm TO WI WV VCXTAM LEVEL
Figure 4. Operating Conditions for Miteshttt" 10V
Cx " room
when ft is the desired bandwidth.
(ft in kHz, Cx in pF)
Figure E Optional Comma Circuit
INPUT OFFSET AND OUTPUT OFFSET
When specifying offsets and other errors in an operational
amplifier, it is often convenient to refer these errors to the
inputs. This enables the user to calculate the maximum error
he would see at the output with any gain or circuit configure
tion. An op amp with lmV of input offset voltage, for
example, would produce IV of offset at the output in a gain
of 1000 configuration.
In the case of an instrumentation amplifier, where the gain is
controlled in the amplifier, it is more convenient to separate
errors into two categories. Those errors which simply add to
the output signal and are unaffected by the gain can be classi-
fied as output errors. Those which act as if they are associated
with the input signal, such that their effect at the output is
proportional to the gain, can be classified as input errors.
As an illustration, a typical ADS21 might have a +30mV output
offset and a -0.7mV input offset. In a unity gain configuration,
the total output offset would be +29.3mV or the sum of the
two. At a gain of 100, the output offset would be -40mV or:
30mV + 100(-0.7mV) = MOrttV.
By separating these errors, one can evaluate the total error
independent of the gain settings used, similar to the situation
with the input offset specifications on an op amp. In a given
gain configuration, both errors can be combined to give a total
error referred to the input (R.T.l.) or output (R.T.O.) by the
following formula:
Total Error R.T.l. = input error + (output error/gain)
Total Error R.T.O. a (Gain x input error) + output error
The offset trim adjustment (pins 4 and 6, Figure 2) is associ-
ated primarily with the output offset. At any gain it can be
used to introduce an output offset equal and opposite to the
input offset voltage multiplied by the gain. As a result, the
total output offset can be reduced to zero.
As shown in Figure 6, the gain range on the A0521 can be
extended considerably by adding an attenuator in the sense
terminal feedback path (as well " adjusting the ratio, Rs/Rc).
Since the sense termiml is the inverting input to the output
amplifier, the additional gain to the output is controlled by
R1 and R2. This gain factor is l ' Re/Ri.
vo-lv-O-yt-vs)]-'-,',,'-'']
Figure 6. Circuit for utilizing come of the unique features of the
A0521. Note that gain changes Introduced by changing Rt and
M will have a minimum effect on output offut If the offset is
cemfully nulled at the highest gain setting.
