AD5200BRM10-REEL7 ,256-Position and 33-Position Digital PotentiometersGENERAL DESCRIPTION has a nominal temperature coefficient of 500 ppm/°C. The VRThe AD5200 and AD520 ..
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AD5201 ,33-Position Digital PotentiometerGENERAL DESCRIPTION has a nominal temperature coefficient of 500 ppm/°C. The VRThe AD5200 and AD520 ..
AD5201BRM10 ,33-Position Digital PotentiometerCHARACTERISTICSBandwidth –3 dB BW_10 kΩ R = 10 kΩ , Code = 10 600 kHzAB HBW_50 kΩ R = 50 kΩ , Code ..
AD5201BRM10-REEL7 ,256-Position and 33-Position Digital PotentiometersCHARACTERISTICSBandwidth –3 dB BW_10 kΩ R = 10 kΩ , Code = 10 600 kHzAB HBW_50 kΩ R = 50 kΩ , Code ..
AD5201BRM50-REEL7 ,256-Position and 33-Position Digital PotentiometersCHARACTERISTICSBandwidth –3 dB BW_10 kΩ R = 10 kΩ , Code = 80 600 kHzAB HBW_50 kΩ R = 50 kΩ , Code ..
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AD8692ARMZ-REEL ,Low Cost, High Performance CMOS Single Supply AmplifierCHARACTERISTICS Offset Voltage V V = −0.3 V to +1.6 V 0.4 2.0 mV OS CM VCM = −0.1 V to +1.6 ..
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AD5200BRM10-REEL7-AD5201BRM10-REEL7-AD5201BRM50-REEL7
256-Position and 33-Position Digital Potentiometers
REV.B
FUNCTIONAL BLOCK DIAGRAM
256-Position and 33-Position
Digital Potentiometers
FEATURES
AD5200—256-Position
AD5201—33-Positionk�, 50k�
3-Wire SPI-Compatible Serial Data Input
Single Supply 2.7V to 5.5V or
Dual Supply �2.7V for AC or Bipolar Operations
Internal Power-On Midscale Preset
APPLICATIONS
Mechanical Potentiometer Replacement
Instrumentation: Gain, Offset Adjustment
Programmable Voltage-to-Current Conversion
Programmable Filters, Delays, Time Constants
Line Impedance Matching
GENERAL DESCRIPTIONThe AD5200 and AD5201 are programmable resistor devices,
with 256 positions and 33 positions respectively, that can be digi-
tally controlled through a 3-wire SPI serial interface. The terms
programmable resistor, variable resistor (VR), and RDAC are
commonly used interchangeably to refer to digital potentiometers.
These devices perform the same electronic adjustment function
as a potentiometer or variable resistor. Both AD5200/AD5201
contain a single variable resistor in the compact µSOIC-10
package. Each device contains a fixed wiper resistance at the
wiper contact that taps the programmable resistance at a point
determined by a digital code. The code is loaded in the serial
input register. The resistance between the wiper and either end
point of the programmable resistor varies linearly with respect to
the digital code transferred into the VR latch. Each variable
resistor offers a completely programmable value of resistance,
between the A terminal and the wiper, or the B terminal and the
wiper. The fixed A-to-B terminal resistance of 10kΩ or 50kΩ
has a nominal temperature coefficient of 500ppm/°C. The VR
has a VR latch that holds its programmed resistance value. The
VR latch is updated from an SPI-compatible serial-to-parallel
shift register that is loaded from a standard 3-wire serial-input
digital interface. Eight data bits for the AD5200 and six data
bits for the AD5201 make up the data word that is clocked into
the serial input register. The internal preset forces the wiper to
the midscale position by loading 80H and 10H into AD5200 and
AD5201 VR latches respectively. The SHDN pin forces the
resistor to an end-to-end open-circuit condition on the A terminal
and shorts the wiper to the B terminal, achieving a microwatt
power shutdown state. When SHDN is returned to logic high,
the previous latch setting puts the wiper in the same resistance
setting prior to shutdown. The digital interface is still active dur-
ing shutdown so that code changes can be made that will produce
a new wiper position when the device is returned from shutdown.
All parts are guaranteed to operate over the extended industrial
temperature range of –40°C to +85°C.
AD5200/AD5201–SPECIFICATIONS
AD5200 ELECTRICAL CHARACTERISTICSNOTESTypicals represent average readings at 25°C and VDD = 5V, VSS = 0V.Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. IW = VDD/R for both VDD = +2.7 V,
VSS = –2.7 V.VAB = VDD, Wiper (VW) = No connect.INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0V. DNL
specification limits of ±1 LSB maximum are Guaranteed Monotonic operating conditions.Resistor Terminals A, B, W have no limitations on polarity with respect to each other.Guaranteed by design and not subject to production test.Measured at the A terminal. A terminal is open-circuited in shutdown mode.PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.All dynamic characteristics use VDD = 5V, VSS = 0V.
Specifications subject to change without notice.
(VDD = 5V � 10%, or 3V � 10%, VSS = 0V, VA = +VDD, VB = 0V,
–40�C < TA < +85�C unless otherwise noted.)
AD5200/AD5201
(VDD = 5V � 10%, or 3V � 10%, VSS = 0V, VA = +VDD, VB = 0V,
–40�C < TA < +85�C unless otherwise noted.)AD5201 ELECTRICAL CHARACTERISTICSDIGITAL INPUTS AND OUTPUTS
DYNAMIC CHARACTERISTICS
NOTESTypicals represent average readings at 25°C and VDD = 5V, VSS = 0V.Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. IW = VDD/R for both VDD = +2.7 V,
VSS = –2.7 V.VAB = VDD, Wiper (VW) = No connect.Six bits are needed for 33 positions even though it is not a 64-position device.INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0V. DNL
specification limits of ±1 LSB maximum are Guaranteed Monotonic operating conditions.Resistor Terminals A, B, W have no limitations on polarity with respect to each other.Guaranteed by design and not subject to production test.Measured at the A terminal. A terminal is open-circuited in shutdown mode.PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.All dynamic characteristics use VDD = 5V, VSS = 0V.
AD5200/AD5201–SPECIFICATIONS
ELECTRICAL CHARACTERISTICSNOTESTypicals represent average readings at 25°C and VDD = 5V, VSS = 0V.Guaranteed by design and not subject to production test.See timing diagram for location of measured values. All input control voltages are specified with tR = tF = 2 ns (10% to 90% of 3V) and timed from a voltage level of
1.5V. Switching characteristics are measured using VLOGIC = 5 V.
Specifications subject to change without notice.
(VDD = 5V � 10%, or 3V � 10%, VSS = 0V, VA = +VDD, VB = 0V, –40�C < TA < +85�C
unless otherwise noted.)Figure 1a. AD5200 Timing Diagram
Figure 1b.AD5201 Timing Diagram
Figure 1c.Detail Timing Diagram
ABSOLUTE MAXIMUM RATINGS1(TA = 25°C, unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3, +7 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V, –7 V
VA, VB, VW to GND . . . . . . . . . . . . . . . . . . . . . . . . . VSS, VDD
IMAX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA2
Digital Inputs and Output Voltage to GND . . . . . . . 0V, 7 V
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Maximum Junction Temperature (TJ Max) . . . . . . . . . 150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 300°C
Thermal Resistance θJA, µSOIC-10 . . . . . . . . . . . . . 200°C/W
Package Power Dissipation = (TJ Max – TA)/θJA
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.Max current is bounded by the maximum current handling of the switches,
maximum power dissipation of the package, and maximum applied voltage across
any two of the A, B, and W terminals at a given resistance. Please refer to TPC 31
and TPC 32 for detail.
PIN CONFIGURATION
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD5200/AD5201 features proprietary ESD protection circuitry, permanent damage may occur
on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
PIN FUNCTION DESCRIPTIONS
ORDERING GUIDE
AD5200/AD5201–Typical Performance Characteristics
CODE – Decimal�0.20
RDNL – LSB
224�0.15
�0.10
�0.05
1921601289664320256TPC 1.AD5200 10 kΩ RDNL vs. Code
CODE – Decimal
RDNL
LSB
–0.03TPC 2.AD5201 10 kΩ RDNL vs. Code
CODE – Decimal
RINL
LSB
0.4TPC 3.AD5200 10 kΩ RINL vs. Code
CODE – Decimal
RINL
LSB
0.10TPC 4.AD5201 10 kΩ RINL vs. Code
CODE – Decimal
DNL
LSB
0.05TPC 5.AD5200 10 kΩ DNL vs. Code
CODE – Decimal
DNL
LSB
0.015TPC 6.AD5201 10 kΩ DNL vs. Code
CODE – Decimal
INL
LSB
–0.5TPC 7.AD5200 10 kΩ INL vs. Code
CODE – Decimal
INL
LSB
–0.010TPC 8.AD5201 10 kΩ INL vs. Code
VIH – V
mA
1.0TPC 9.Supply Current vs. Logic Input Voltage
TPC 10.Supply Current vs. Temperature
TPC 11.Shutdown Current vs. Temperature
VSUPPLY – V
ON
1004321TPC 12.Wiper ON Resistance vs. VSUPPLY
AD5200/AD5201TPC 13.AD5200 10 kΩ Supply Current vs. Clock Frequency
FREQUENCY – Hz
SS
10k
100k1M10MTPC 14.AD5200 10 kΩ Supply Current vs. Clock Frequency
FREQUENCY – Hz
PSRR
dB
1001k10k1M
100kTPC 15.Power Supply Rejection Ratio vs. Frequency
FREQUENCY – Hz
GAIN
dB10k100k1M
–12TPC 16.AD5200 10 kΩ Gain vs. Frequency vs. Code
FREQUENCY – Hz
GAIN
dB10k100k1M
–12TPC 17.AD5200 50 kΩ Gain vs. Frequency vs. Code
FREQUENCY – Hz
GAIN
dB10k100k1M
–12TPC 18.AD5201 10 kΩ Gain vs. Frequency vs. Code
