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AD5170BRM10-AD5170BRM100-AD5170BRM10-RL7-AD5170BRM50
256-Position, Two-Time Programmable, I2C Compatible Digital Potentiometer
256-Position Two-Time Programmable2C Digital Potentiometer
Rev. A
FEATURES
256-position
TTP (two-time programmable) set-and-forget resistance
setting allows second-chance permanent programming
Unlimited adjustments prior to OTP (one-time
programming) activation
OTP overwrite allows dynamic adjustments with user
defined preset
End-to-end resistance: 2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Compact MSOP-10 (3 mm × 4.9 mm) package
Fast settling time: tS = 5 µs typ in power-up
Full read/write of wiper register
Power-on preset to midscale
Extra package address decode pins AD0 and AD1
Single-supply 2.7 V to 5.5 V
Low temperature coefficient: 35 ppm/°C
Low power, IDD = 6 µA maximum
Wide operating temperature: –40°C to +125°C
Evaluation board and software are available
Software replaces µC in factory programming applications
APPLICATIONS
Systems calibration
Electronics level setting
Mechanical Trimmers® replacement in new designs
Permanent factory PCB setting
Transducer adjustment of pressure, temperature, position,
chemical, and optical sensors
RF amplifier biasing
Automotive electronics adjustment
Gain control and offset adjustment
GENERAL OVERVIEW The AD5170 is a 256-position, two-time programmable (TTP)
digital potentiometer1 that employs fuse link technology to
enable two opportunities at permanently programming the
resistance setting. OTP is a cost-effective alternative to EEMEM
for users who do not need to program the digital potentiometer
setting in memory more than once. This device performs the
same electronic adjustment function as mechanical
potentiometers or variable resistors with enhanced resolution,
solid-state reliability, and superior low temperature coefficient
performance.
FUNCTIONAL BLOCK DIAGRAM
VDD
SDA
SCL
AD0
AD1A04104-0-001
Figure 1.
The AD5170 is programmed using a 2-wire, I2C® compatible
digital interface. Unlimited adjustments are allowed before
permanently (there are actually two opportunities) setting the
resistance value. During OTP activation, a permanent blow fuse
command freezes the wiper position (analogous to placing
epoxy on a mechanical trimmer).
Unlike traditional OTP digital potentiometers, the AD5170 has
a unique temporary OTP overwrite feature that allows for new
adjustments even after the fuse has been blown. However, the
OTP setting is restored during subsequent power-up
conditions. This feature allows users to treat these digital
potentiometers as volatile potentiometers with a programmable
preset.
For applications that program the AD5170 at the factory,
Analog Devices offers device programming software running
on Windows NT®, 2000, and XP® operating systems. This
software effectively replaces any external I2C controllers, thus
enhancing the time-to-market of the user’s systems.
1 The terms digital potentiometer, VR, and RDAC are used interchangeably.
TABLE OF CONTENTS Electrical Characteristics — 2.5 kΩ...............................................3
Electrical Characteristics — 10 kΩ, 50 kΩ, 100 kΩ Versions.....4
Timing Characteristics — 2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Versions..............................................................................................5
Absolute Maximum Ratings............................................................6
ESD Caution..................................................................................6
Typical Performance Characteristics.............................................7
Test Circuits.....................................................................................11
Theory of Operation......................................................................12
One-Time Programming (OTP)..............................................12
Programming the Variable Resistor and Voltage...................12
Programming the Potentiometer Divider...............................13
ESD Protection...........................................................................14
Terminal Voltage Operating Range.........................................14
Power-Up Sequence...................................................................14
Power Supply Considerations...................................................14
Layout Considerations...............................................................15
Evaluation Software/Hardware.....................................................16
Software Programming.............................................................16 2C Interface....................................................................................18 2C Compatible 2-Wire Serial Bus...........................................20
Pin Configuration and Function Descriptions...........................22
Outline Dimensions.......................................................................23
Ordering Guide..........................................................................23
REVISION HISTORY
11/04—Data Sheet Changed from Rev. 0 to Rev. A Changes to Electrical Characteristics Table 1...............................3
Changes to Electrical Characteristics Table 2...............................4
Changes to One-Time Programming .........................................12
Changes to Figure 37, Figure 38, and Figure 39 ........................14
Changes to Power Supply Considerations...................................14
Changes to Figure 40......................................................................15
Changes to Layout Considerations..............................................15
11/03—Revision 0: Initial Version
ELECTRICAL CHARACTERISTICS — 2.5 kΩ VDD = 5 V ± 10% or 3 V ±10%, VA = +VDD, VB = 0 V, –40°C < TA < +125°C, unless otherwise noted.
Table 1. Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, Wiper (VW) = no connect. INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V. DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. Resistor terminals A, B, W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test. Measured at the A terminal. The A terminal is open circuited in shutdown mode.
8 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation. All dynamic characteristics use VDD = 5 V.
ELECTRICAL CHARACTERISTICS — 10 kΩ, 50 kΩ, 100 kΩ VERSIONS VDD = 5 V ± 10% or 3 V ± 10%, VA = VDD; VB = 0 V, –40°C < TA < +125°C, unless otherwise noted.
Table 2. Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, Wiper (VW) = no connect. INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V. DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. Resistor terminals A, B, W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
7 Measured at the A terminal. The A terminal is open circuited in shutdown mode. Different from operating power supply, power supply OTP is used one time only.
9 Different from operating current, supply current for OTP lasts approximately 400 ms for one time only.
TIMING CHARACTERISTICS — 2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS VDD = 5 V ± 10% or 3 V ± 10%, VA = VDD; VB = 0 V, –40°C < TA < +125°C, unless otherwise noted.
Table 3. See timing diagrams for locations of measured values.
2 The maximum tHD;DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted.
Table 4. Maximum terminal current is bound by the maximum current handling of
the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance. Package power dissipation = (TJMAX – TA)/θJA.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
TYPICAL PERFORMANCE CHARACTERISTICS
RHEOSTAT MODE INL (LSB)
CODE (DECIMAL)Figure 2. R-INL vs. Code vs. Supply Voltages
RHE
TAT MODE
DNL (LS
CODE (DECIMAL)Figure 3. R-DNL vs. Code vs. Supply Voltages
NTIOME
R MODE
INL (LS
CODE (DECIMAL)Figure 4. INL vs. Code vs. Temperature
NTIOME
R MODE
DNL (LS
CODE (DECIMAL)Figure 5. DNL vs. Code vs. Temperature
NTIOME
R MODE
INL (LS
CODE (DECIMAL)Figure 6. INL vs. Code vs. Supply Voltages
NTIOME
R MODE
DNL (LS
CODE (DECIMAL)Figure 7. DNL vs. Code vs. Supply Voltages
RHEOSTAT MODE INL (LSB)
CODE (DECIMAL)Figure 8. R-INL vs. Code vs. Temperature
RHE
TAT MODE
DNL (LS
CODE (DECIMAL)Figure 9. R-DNL vs. Code vs. Temperature
FSE, FU
LL-
E ER
TEMPERATURE (°C)
–40–25–105203550658095110125Figure 10. Full-Scale Error vs. Temperature
, ZE
RO-S
CALE
RROR (LS
TEMPERATURE (°C)
–40–25–105203550658095110125Figure 11. Zero-Scale Error vs. Temperature
IDD
, S
CURRE
NT (
TEMPERATURE (°C)Figure 12. Supply Current vs. Temperature
RHEOSTAT MODE TE
CO (ppm/
CODE (DECIMAL)Figure 13. Rheostat Mode Tempco ∆RWB/∆T vs. Code
NTIOME
R MODE
TE
CO (ppm/
CODE (DECIMAL)Figure 14. Potentiometer Mode Tempco ∆VWB/∆T vs. Code
GAIN (
FREQUENCY (Hz)
10k1M100k10MFigure 15. Gain vs. Frequency vs. Code, RAB = 2.5 kΩ
GAIN (
FREQUENCY (Hz)100k10k1MFigure 16. Gain vs. Frequency vs. Code, RAB = 10 kΩ
GAIN (
FREQUENCY (Hz)100k10k1MFigure 17. Gain vs. Frequency vs. Code, RAB = 50 kΩ
GAIN (
FREQUENCY (Hz)100k10k1MFigure 18. Gain vs. Frequency vs. Code, RAB = 100 kΩ
GAIN (
FREQUENCY (Hz)
10k1k100k1M10MFigure 19. –3 dB Bandwidth at Code = 0x80
IDD
, S
CURRE
NT (mA)
DIGITAL INPUT VOLTAGE (V)Figure 20. IDD vs. Input Voltage
Figure 21. Digital Feedthrough
Figure 22. Midscale Glitch, Code 0x80 to 0x7F
Figure 23. Large Signal Settling Time
TEST CIRCUITS Figure 24 to Figure 29 illustrate the test circuits that define the
test conditions used in the product specification tables.
V+ = VDD
1LSB = V+/2N
Figure 24. Test Circuit for Potentiometer Divider Nonlinearity Error (INL, DNL)
NO CONNECT
Figure 25. Test Circuit for Resistor Position Nonlinearity Error
(Rheostat Operation; R-INL, R-DNL)
04104-0-028
– VMS2]/IWFigure 26. Test Circuit for Wiper Resistance
∆VMS%( )∆VDD%
∆VMS
∆VDD
V+ = VDD± 10%
PSRR (dB) = 20 LOG
PSS (%/%) =Figure 27. Test Circuit for Power Supply Sensitivity (PSS, PSSR)
+15V
2.5VVOUT
OFFSET
GND
VIN
Figure 28. Test Circuit for Gain vs. Frequency
VCM
NC = NO CONNECT04104-0-032
Figure 29. Test Circuit for Common-Mode Leakage Current
THEORY OF OPERATION
SDA
SCL04103-0-026
Figure 30. Detailed Functional Block Diagram
The AD5170 is a 256-position, digitally controlled variable
resistor (VR) that employs fuse link technology to achieve
memory retention of resistance setting.
An internal power-on preset places the wiper at midscale
during power-on. If the OTP function has been activated, the
device powers up at the user-defined permanent setting.
ONE-TIME PROGRAMMING (OTP) Prior to OTP activation, the AD5170 presets to midscale during
initial power-on. After the wiper is set at the desired position,
the resistance can be permanently set by programming the T bit
high along with the proper coding (see Table 7 and Table 8) and
one time VDD_OTP. Note that fuse link technology of the
AD517x family of digital pots requires VDD_OTP between 5.25 V
and 5.5 V to blow the fuses to achieve a given nonvolatile
setting. On the other hand, VDD can be 2.7 V to 5.5 V during
operation. As a result, system supply that is lower than 5.25 V
requires external supply for one-time programming. Note that
the user is allowed only one attempt in blowing the fuses. If the
user fails to blow the fuses at the first attempt, the fuses’
structures may have changed such that they may never be
blown regardless of the energy applied at subsequent events. For
details, see the Power Supply Considerations section.
The device control circuit has two validation bits, E1 and E0,
that can be read back to check the programming status (see
Table 7). Users should always read back the validation bits to
ensure that the fuses are properly blown. After the fuses have
been blown, all fuse latches are enabled upon subsequent
power-on; therefore, the output corresponds to the stored
setting. Figure 30 shows a detailed functional block diagram.
PROGRAMMING THE VARIABLE RESISTOR AND
VOLTAGE
Rheostat Operation The nominal resistance of the RDAC between Terminal A and
Terminal B is available in 2.5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ.
The nominal resistance (RAB) of the VR has 256 contact points
accessed by the wiper terminal, plus the B terminal contact. The
8-bit data in the RDAC latch is decoded to select one of 256
possible settings.
04103-0-027
Figure 31. Rheostat Mode Configuration
Assuming a 10 kΩ part is used, the wiper’s first connection
starts at the B terminal for data 0x00. Because there is a 50 Ω
wiper contact resistance, such a connection yields a minimum
of 100 Ω (2 × 50 Ω) resistance between Terminal W and
Terminal B. The second connection is the first tap point, which
corresponds to 139 Ω (RWB = RAB/256 + 2 × RW = 39 Ω + 2 × 50 Ω)
for data 0x01. The third connection is the next tap point, repre-
senting 178 Ω (2 × 39 Ω + 2 × 50 Ω) for data 0x02, and so on.
Each LSB data value increase moves the wiper up the resistor
ladder until the last tap point is reached at 10,100 Ω (RAB + 2 × RW).
