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256-Position SPI Compatible Digital Potentiometer
256-Position SPI Compatible
Digital Potentiometer
Rev. 0
FEATURES
256-position
End-to-end resistance 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Compact SOT-23-8 (2.9 mm × 3 mm) package
SPI compatible interface
Power-on preset to midscale
Single supply 2.7 V to 5.5 V
Low temperature coefficient 45 ppm/°C
Low power, IDD = 8 µA
Wide operating temperature –40°C to +125°C
Evaluation board available
APPLICATIONS
Mechanical potentiometer replacement in new designs
Transducer adjustment of pressure, temperature, position,
chemical, and optical sensors
RF amplifier biasing
Automotive electronics adjustment
Gain control and offset adjustment
GENERAL OVERVIEW The AD5160 provides a compact 2.9 mm × 3 mm packaged
solution for 256-position adjustment applications. These devices
perform the same electronic adjustment function as mechanical
potentiometers or variable resistors, with enhanced resolution,
solid-state reliability, and superior low temperature coefficient
performance.
The wiper settings are controllable through an SPI compatible
digital interface. The resistance between the wiper and either
end point of the fixed resistor varies linearly with respect to the
digital code transferred into the RDAC latch.
Operating from a 2.7 V to 5.5 V power supply and consuming
less than 5 µA allows for usage in portable battery-operated
applications.
FUNCTIONAL BLOCK DIAGRAM
CS
SDI
CLK
GND
VDDFigure 1.
PIN CONFIGURATION
SDI
VDD
GND
CLK
TOP VIEW
(Not to Scale)
AD5160Figure 2.
Note:
The terms digital potentiometer, VR, and RDAC are used interchangeably.
TABLE OF CONTENTS Electrical Characteristics—5 kΩ Version......................................3
Electrical Characteristics—10 kΩ, 50 kΩ, 100 kΩ Versions.......4
Timing Characteristics—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Versions5
Absolute Maximum Ratings ...........................................................5
Typical Performance Characteristics.............................................6
Test Circuits.....................................................................................10
SPI Interface....................................................................................11
Operation.........................................................................................12
Programming the Variable Resistor.........................................12
Programming the Potentiometer Divider...............................13
SPI Compatible 3-Wire Serial Bus...........................................13
ESD Protection...........................................................................13
Terminal Voltage Operating Range..........................................13
Power-Up Sequence...................................................................13
Layout and Power Supply Bypassing.......................................14
Pin Configuration and Function Descriptions...........................15
Pin Configuration......................................................................15
Pin Function Descriptions........................................................15
Outline Dimensions.......................................................................16
Ordering Guide..........................................................................16
ESD Caution................................................................................16
REVISION HISTORY Revision 0: Initial Version
ELECTRICAL CHARACTERISTICS—5 kΩ VERSION (VDD = 5 V ± 10%, or 3 V ± 10%; VA = +VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.)
Table 1.
ELECTRICAL CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS (VDD = 5 V ± 10%, or 3 V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.)
Table 2.
TIMING CHARACTERISTICS—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS (VDD = +5V ± 10%, or +3V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.)
Table 3.
NOTES Typical specifications represent average readings at +25°C and VDD = 5 V.
2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. VAB = VDD, Wiper (VW) = no connect. INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. Resistor terminals A, B, W have no limitations on polarity with respect to each other. Guaranteed by design and not subject to production test.
7 Measured at the A terminal. The A terminal is open circuited in shutdown mode. PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
9 All dynamic characteristics use VDD = 5 V. See timing diagram for location of measured values. All input control voltages are specified with tR = tF = 2 ns (10% to 90% of 3 V) and timed from a voltage
level of 1.5 V.
ABSOLUTE MAXIMUM RATINGS1 (TA = +25°C, unless otherwise noted.)
Table 4.
NOTES Maximum terminal current is bounded by the maximum current handling of
the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance. Package power dissipation = (TJMAX – TA)/θJA.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
TYPICAL PERFORMANCE CHARACTERISTICS
CODE (Decimal)
RHEOSTAT MODE INL (LSB)
0.8Figure 3. R-INL vs. Code vs. Supply Voltages
RHE
TAT MODE
DNL (LS
CODE (Decimal)09664128160192224256Figure 4. R-DNL vs. Code vs. Supply Voltages
NTIOME
R MODE
INL (LS
CODE (Decimal)09664128160192224256Figure 5. INL vs. Code, VDD = 5 V
CODE (Decimal)
NTIOME
R MODE
DNL (LS
0.8Figure 6. DNL vs. Code, VDD = 5 V
NTIOME
R MODE
INL (LS
CODE (Decimal)09664128160192224256Figure 7. INL vs. Code vs. Supply Voltages
CODE (Decimal)
NTIOME
R MODE
DNL(LS
1.0Figure 8. DNL vs. Code vs. Supply Voltages
RHEOSTAT MODE INL (LSB)
CODE (Decimal)Figure 9. R-INL vs. Code, VDD = 5 V
RHE
TAT MODE
DNL (LS
CODE (Decimal)09664128160192224256Figure 10. R-DNL vs. Code, VDD = 5 V
TEMPERATURE (°C)4080120–40
FSE, FU
LL-
E ER4080120–40
0.5Figure 11. Full-Scale Error vs. Temperature
4080120–40
, ZE
RO-S
CALE
RROR (
TEMPERATURE (°C)4080120–40
0.5Figure 12. Zero-Scale Error vs. Temperature
TEMPERATURE (°C)4080120–40
CURRE
NT (Figure 13. Supply Current vs. Temperature
HUTDOWN CURRE
NT (nA)
TEMPERATURE (°C)80120–40Figure 14. Shutdown Current vs. Temperature
CODE (Decimal)
RHEOSTAT MODE TEMPCO
(ppm/°C)
CODE (Decimal)
NTIOME
R MODE
TE
(ppm/°C)10k100k1M
REF LEVEL
0.000dB
/DIV
6.000dB
MARKER 1 000 000.000Hz
MAG (A/R)–8.918dB
START 1 000.000Hz STOP 1 000 000.000Hz Figure 17. Gain vs. Frequency vs. Code, RAB = 5 kΩ
10k100k1M
REF LEVEL
0.000dB
/DIV
6.000dB
MARKER 510 634.725Hz
MAG (A/R)–9.049dB
START 1 000.000Hz STOP 1 000 000.000Hz Figure 18. Gain vs. Frequency vs. Code, RAB = 10 kΩ
10k100k1M
REF LEVEL
0.000dB
/DIV
6.000dB
MARKER 100 885.289Hz
MAG (A/R)–9.014dB
START 1 000.000Hz STOP 1 000 000.000Hz Figure 19. Gain vs. Frequency vs. Code, RAB = 50 kΩ
10k100k1M
REF LEVEL
0.000dB
/DIV
6.000dB
MARKER 54 089.173Hz
MAG (A/R)–9.052dB
START 1 000.000Hz STOP 1 000 000.000Hz Figure 20. Gain vs. Frequency vs. Code, RAB = 100 kΩ
