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AD2S99AP
Programmable Oscillator
REV.B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third partiesProgrammable
Oscillator
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The AD2S99 programmable sinusoidal oscillator provides sine
wave excitation for resolvers and a wide variety of ac transduc-
ers. The AD2S99 also provides a synchronous reference output
signal (3 V p-p square wave) that is phase locked to its SIN and
COS inputs. In an application, the SIN and COS inputs are
connected to the transducer’s secondary windings.
The synchronous reference output compensates for temperature
and cabling dependent phase shifts and eliminates the need for
external preset phase compensation circuits. The synchronous
reference output can be used as a zero crossing reference for
resolver-to-digital converters such as Analog Devices’ AD2S80A,
AD2S82A, AD2S83 and AD2S90.
The AD2S99 is packaged in a 20-pin PLCC and operates over
–40°C to +85°C.
FEATURES
Programmable Sinusoidal Oscillator
Synthesized Synchronous Reference Output
ProgrammableOutputFrequencyRange:2kHz–20 kHz
“Loss-of-Signal” Indicator
20-Pin PLCC Package
Low Cost
APPLICATIONS
Excitation Source for:
Resolvers
Synchros
LVDTs
RVDTs
Pressure Transducers
Load Cells
AC Bridges
AD2S99–SPECIFICATIONS
NOTESFrequency select pins SEL1 and SEL2 must be connected to appropriate voltage levels before power is applied.
Specifications subject to change without notice.
(VS = 64.75V to 65.25 V @ –408C to +858C unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS*
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –7 V
Operating Temperature . . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Analog Input Voltages (SIN and COS) . . . . . . . . .VSS – 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .to VDD + 0.3 V
Frequency Select (SEL1, SEL2) . . . . . . . . . . . . . .VSS – 0.4 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .to AGND + 0.4 V
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Power Supply Voltage (VDD to VSS) . . . . . .±4.75 V to ±5.25 V
Analog Input Voltage (SIN and COS) . . . . . . . .2 V rms ±10%
Frequency Select (SEL1 and SEL2) . . . . . . . . .VSS to AGND
Operating Temperature Range . . . . . . . . . . . . .–40°C to +85°C
PIN DESIGNATIONS
NOTESPins 6 and 16 must be connected together.Pins 19 and 20 must be connected together.Resolver Reference two (EXC) is 180° phase advanced with respect to Resolver
Reference one (EXC).
PIN CONFIGURATION
ORDERING GUIDE
*P = PLCC.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD2S99 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
AD2S99
AD2S99 OSCILLATOR OUTPUT STAGE
The output of the AD2S99 oscillator consists of two sinusoidal
signals, EXC, and EXC. EXC is 180° phase advanced with re-
spect to EXC. The excitation winding of a transducer should be
connected across EXC (Pin 17) and EXC (Pin 18).
With low impedance transducers, it may be necessary to in-
crease the output current drive of the AD2S99. In such an in-
stance, an external buffer amplifier can be used to provide gain
(as needed), and additional current drive for the excitation out-
put (either EXC or EXC) of the AD2S99, providing a single
ended drive to the transducer. Refer to Figures 6, 7 and 8 for
sample buffer configurations.
The amplitude modulated SIN and COS output signals from a re-
solver should be connected as feedback signals to the AD2S99.
The SYNREF output compensates for any primary to secondary
phase errors in the resolver. These errors can degrade the accuracy
of a Resolver-to-Digital Converter (R/D Converter).
SIN, from the resolver, should be connected to the AD2S99 SIN
input and COS should be connected to the AD2S99 COS input.
The SIN Lo, COS Lo (resolver signal returns) should be con-
nected to AGND and the R/D Converter as applicable.
The synthesized reference (SYNREF) from the AD2S99 should
be connected to the reference input pin of the R/D Converter.
The SYNREF signal is a square wave at the oscillator frequency
of amplitude ±
COS inputs. If this signal is used to drive the reference input of
the AD2S90 R/D Converter, a coupling capacitor and resistor to
GND must be connected between the SYNREF output of the
AD2S99 and the REF input of the R/D Converter (see Figure
3). Please read the appropriate R/D Converter data sheets for
further clarification.
LOSS OF SIGNAL
During normal operation when both the SIN and COS signals
on the resolver secondary windings are connected to the
AD2S99, the LOS output pin of the AD2S99 (Pin 11) is at a
Logic Lo (<0.7 V). If both the SIN and COS signals on the re-
solver secondary windings fall below the LOS threshold level of
the AD2S99, the LOS pin of the AD2S99 will pull up to a
Logic Hi (VDD) level.
CONNECTING THE AD2S99 OSCILLATOR
Refer to Figure 1. Positive supply voltage VDD should be con-
nected to Pin 12 and negative supply voltage VSS should be con-
nected to both Pins 19 and 20. Reversal of these power supplies will
destroy the device. The appropriate voltage level for the power
supplies is ±5 V dc ± 5%. Both VSS Pins (19 and 20) must be
connected together, and Digital Ground (Pin 6) must be con-
nected to Analog Ground (Pin 16) locally at the AD2S99.
Figure 1.Typical Configuration
It is recommended that decoupling capacitors are connected in
parallel between VDD and Analog Ground and VSS and Analog
Ground in close proximity to the AD2S99. The recommended
values for the decoupling capacitors are 100 nF (ceramic) and
4.7 μF (tantalum). When multiple AD2S99s are used, separate
decoupling capacitors should be used for each AD2S99.
FREQUENCY ADJUSTMENT
The output frequency of the AD2S99 is programmable to four
standard frequencies (2, 5, 10, or 20 kHz) using the SEL1 and
SEL2 pins. The output can also be adjusted to provide interme-
diate frequencies by connecting a resistor from the FBIAS pin to
the positive supply VDD. The FBIAS pin is connected directly to
VDD during normal operation. A graph showing the typical
added resistance values for various intermediate frequencies is
provided in Figure 2. The procedure for obtaining an intermedi-
ate frequency is:Set the output frequency via the SEL1, SEL2 pins to the fre-
quency immediately above the required intermediate frequency.Connect the frequency adjust pin FBIAS to VDD via an exter-
nal resistor.
For example: to obtain an output frequency of 8 kHz, set the
nominal output frequency to 10 kHz by connecting SEL1 to
GND and SEL2 to VSS. Connect FBIAS to VDD via a 6 kΩ
resistor (refer to Figure 2).
AD2S99/AD2S90 TYPICAL CONFIGURATION
Figure 3 shows a typical circuit configuration for the AD2S99
Oscillator and the AD2S90 Resolver-to-Digital Converter. The
maximum level of the SIN and COS input signals to the
AD2S90 should be 2 V rms ±10%. All the analog ground sig-
nals should be star connected to the AD2S90 AGND pin. If
shielded twisted pair cables are used for the resolver signals, the
shields should also be terminated at the AD2S90 AGND pin.
The SYNREF output of the AD2S99 should be connected to
the REF input pin of the AD2S90 via a 0.1 μF capacitor with a
100 kΩ resistor to GND. This is to block out any dc offset in
the SYNREF signal. For more detailed information please refer
to the AD2S90 data sheet.R4
RESOLVER
VDD
VSS
SEL2 = GND
SEL1 = VSS
FOUT = 5kHz
RETURN
Figure 3.AD2S99 and AD2S90 Example Configuration
AD2S99
AD2S99/AD2S82A TYPICAL CONFIGURATION
Figure 4 shows a typical circuit configuration for the AD2S99
Oscillator and the AD2S82A Resolver-to-Digital Converter.
The maximum level of the SIN and COS input signals to the
AD2S82A should be 2 V rms ±10%. All the analog ground sig-
nals should be star connected to the AD2S82A AGND pin. If
shielded twisted pair cables are used for the resolver signals, the
shields should also be terminated at the AD2S82A AGND pin.
Coupling capacitor C3, and resistor to GND R3, between the
SYNREF output of the AD2S99 and the REF input pin of the
AD2S82A are optional. For additional information on selecting
component values for the AD2S82A, please refer to the
AD2S82A data sheet or the application note “Passive Compo-
nent Selection and Dynamic Modeling for the AD2S80 Series
Resolver-to-Digital Converters” (AN-266).
R3, C3 OPTIONALVELOCITY
OUTPUT
NC = NO CONNECT
FOUT = 10kHz
Figure 4.AD2S99 and AD2S82A Example Configuration

Partno	Mfg	Dc	Qty	Available	Descript
AD2S99AP	ADI	N/a	100	avai	Programmable Oscillator
AD2S99AP	AD	N/a	1000	avai	Programmable Oscillator