AD2S81AJD ,Variable Resolution, Monolithic Resolver-to-Digital ConvertersFEATURESMonolithic (BiMOS ll) Tracking R/D ConverterINTEGRATORDEMOD DEMODRatiometric ConversionI/P ..
AD2S82AHP ,Variable Resolution, Monolithic Resolver-to-Digital Convertersapplications to provideThe output word is in a three-state digital logic form available inloop stab ..
AD2S82AHP ,Variable Resolution, Monolithic Resolver-to-Digital ConvertersAPPLICATIONScan be used to replace a tachogenerator.DC Brushless and AC Motor ControlProcess Contro ..
AD2S82AJP ,Variable Resolution, Monolithic Resolver-to-Digital ConvertersVariable Resolution, MonolithicaResolver-to-Digital ConvertersAD2S81A/AD2S82AAD2S82A FUNCTIONAL BLO ..
AD2S82AJPZ , Variable Resolution, Monolithic Resolver-to-Digital Converters
AD2S82AKP ,Variable Resolution, Monolithic Resolver-to-Digital ConvertersGENERAL DESCRIPTIONthe resolution of the AD2S82A to be 10, 12, 14 or 16 bits al-The AD2S82A is a mo ..
AD8544 ,Quad Rail-to-Rail Input and Output, Single Supply Amplifier Featuring Very Low Supply CurrentCHARACTERISTICSOffset Voltage V 16 mVOS–40°C ≤ T ≤ +125°C7mVA Input Bias Current I 460 pAB–40°C ≤ T ..
AD8544 ,Quad Rail-to-Rail Input and Output, Single Supply Amplifier Featuring Very Low Supply CurrentCHARACTERISTICSOutput Voltage High V I = 1 mA 2.875 2.955 VOH L–40°C ≤ T ≤ +125°C 2.850 VA Output V ..
AD8544AR ,General Purpose CMOS Rail-to-Rail AmplifiersGENERAL DESCRIPTIONThe AD8541/AD8542/AD8544 are single, dual and quad rail-to-rail input and output ..
AD8544ARU ,General Purpose CMOS Rail-to-Rail AmplifiersCHARACTERISTICSOutput Voltage High V I = 1 mA +2.875 +2.955 VOH L–40°C ≤ T ≤ +125°C +2.850 VA Outpu ..
AD8544ARU-REEL , General Purpose CMOS Rail-to-Rail Amplifiers
AD8544ARZ-REEL7 , General-Purpose CMOS Rail-to-Rail Amplifiers
AD2S81AJD-AD2S82AHP-AD2S82AJP-AD2S82AKP-AD2S82ALP
Variable Resolution, Monolithic Resolver-to-Digital Converters
REV. B
Variable Resolution, Monolithic
Resolver-to-Digital ConvertersAn analog signal proportional to velocity is also available and
can be used to replace a tachogenerator.
PRODUCT HIGHLIGHTS
Monolithic. A one-chip solution reduces the package size re-quired and increases the reliability.
Resolution Set by User. Two control pins are used to selectthe resolution of the AD2S82A to be 10, 12, 14 or 16 bits al-
lowing the user to use the AD2S82A with the optimum resolu-
tion for each application.
Ratiometric Tracking Conversion. Conversion techniqueprovides continuous output position data without conversion
delay and is insensitive to absolute signal levels. It also provides
good noise immunity and tolerance to harmonic distortion on
the reference and input signals.
Dynamic Performance Set by the User. By selecting exter-nal resistor and capacitor values the user can determine band-
width, maximum tracking rate and velocity scaling of the
converter to match the system requirements. The external com-
ponents required are all low cost, preferred value resistors and
capacitors, and the component values are easy to select using
the simple instructions given.
Velocity Output. An analog signal proportional to velocity isavailable and is linear to typically one percent. This can be used
in place of a velocity transducer in many applications to provide
loop stabilization in servo controls and velocity feedback data.
Low Power Consumption. Typically only 300 mW.
MODELS AVAILABLEInformation on the models available is given in the Ordering
Guide.
GENERAL DESCRIPTIONThe AD2S82A is a monolithic 10-, 12-, 14- or 16-bit tracking
resolver-to-digital converter contained in a 44-lead J leaded
PLCC package. Two extra functions are provided in the new
surface mount package–COMPLEMENT and VCO output.
The AD2S81A is a monolithic 12-bit fixed resolution tracking
resolver-to-digital converter packaged in a 28-lead DIP.
The converters allow users to select their own dynamic performance
with external components. This allows the users great flexibility in
defining the converter that best suits their system requirements.
The AD2S82A allows users to select the resolution to be 10, 12,
14 or 16 bits and to track resolver signals rotating at up to 1040
revs per second (62,400 rpm) when set to 10-bit resolution.
The AD2S81A and AD2S82A convert resolver format input
signals into a parallel natural binary digital word using a ratio-
metric tracking conversion method. This ensures high-noise
immunity and tolerance of lead length when the converter is
remote from the resolver.
The output word is in a three-state digital logic form available in
two bytes on the 16 output data lines for the AD2S82A and on
eight output data lines for the AD2S81A. BYTE SELECT,ENABLE and INHIBIT pins ensure easy data transfer to 8- and
16-bit data buses, and outputs are provided to allow for cycle or
pitch counting in external counters.
AD2S82A FUNCTIONAL BLOCK DIAGRAM
FEATURES
Monolithic (BiMOS ll) Tracking R/D Converter
Ratiometric Conversion
Low Power Consumption: 300 mW Typ
Dynamic Performance Set by User
Velocity Output
ESD Class 2 Protection (2,000 V Min)
AD2S81A
28-Lead DIP Package
Low Cost
AD2S82A
44-Lead PLCC Package
10-, 12-, 14- and 16-Bit Resolution Set by User
High Max Tracking Rate 1040 RPS (10 Bits)
VCO Output (Inter LSB Output)
Data Complement Facility
Industrial Temperature Range
APPLICATIONS
DC Brushless and AC Motor Control
Process Control
Numerical Control of Machine Tools
Robotics
Axis Control
AD2S81A/AD2S82A–SPECIFICATIONSREFERENCE INPUT
DIGITAL POSITION
BYTE SELECT
SHORT CYCLE INPUTS
DATA LOAD
(@ TA = +258C, unless otherwise noted)
DIRECTION
RIPPLE CLOCK
DIGITAL INPUTS
NOTESRefers to small signal bandwidth.Output offset dependent on value for R6.Refer to timing diagram.AD2S82A only.These pins are referenced to +VS (i.e., HI = +12 V, LO = 0 V).
AD2S81A/AD2S82A
PHASE SENSITIVE DETECTOR
INTEGRATOR
VCO
POWER SUPPLIES
NOTESThe VCO output swings between –3 V depending on the resolver direction.AD2S82A only.
Specifications in boldface are tested on all production units at final electrical test.
Specifications subject to change without notice.
(typical @ +258C unless otherwise noted)AD2S81A/AD2S82A–SPECIFICATIONS
ESD SENSITIVITYThe AD2S81A and AD2S82A features an input protection circuit consisting of large “distributed”
diodes and polysilicon series resistors to dissipate both high energy discharge (Human Body Model)
and fast, low energy pulses (Charges Device Model).
ORDERING GUIDE*D = Ceramic DIP Package; P = Plastic Leaded Chip Carrier (PLCC) Package.
RECOMMENDED OPERATING CONDITIONSPower SupplyVoltage (+VS to –VS) . . . . . . . . .–12 V dc –10%
Power Supply Voltage VL . . . . . . . . . . . . . . . . . .+5 V dc –10%
Analog Input Voltage (SIN and COS) . . . . . . . .2 V rms –10%
Analog Input Voltage (REF) . . . . . . . . . . . . . .1 V to 8 V peak
Signal and Reference Harmonic Distortion . . . . . . .10% (max)
Phase Shift Between Signal and Reference .–10 Degrees (max)
Ambient Operating Temperature Range
Commercial (JD) . . . . . . . . . . . . . . . . . . . . . .0°C to +70°C
Industrial (HP, JP, KP, LP) . . . . . . . . . . . .–40°C to +85°C
PIN FUNCTION DESCRIPTIONS*AD2S82A Only.
Bit Weight Table
ABSOLUTE MAXIMUM RATINGS1 (with respect to GND)
+VS2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V dc
–VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–14 V dc
+VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+VS
Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
SIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
COS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
Any Logical Input . . . . . . . . . . . . . . . . . . .–0.4 V dc to +VL dc
Demodulator Input . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
Integrator Input . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
VCO Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . .860 mW
Operating Temperature
Commercial (JD) . . . . . . . . . . . . . . . . . . . . . .0°C to +70°C
Industrial (HP, JP, KP, LP) . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature (All Grades) . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . .+300°C
CAUTION1. Absolute Maximum Ratings are those values beyond which damage to the
device may occur.
2. Correct polarity voltages must be maintained on the +VS and –VS pins.
AD2S81A/AD2S82A PIN CONFIGURATIONS
AD2S81A/AD2S82A
CONNECTING THE CONVERTERThe power supply voltages connected to +VS and –VS pins
should be +12 V dc and –12 V dc and must not be reversed.
The voltage applied to VL can be +5 V dc to +VS.
It is recommended that the decoupling capacitors are connected
in parallel between the power lines +VS, –VS and ANALOG GND
adjacent to the converter. Recommended values are 100 nF
(ceramic) and 10 mF (tantalum). Also capacitors of 100 nF and
10 mF should be connected between +VL and DIGITAL GND
adjacent to the converter.
When more than one converter is used on a card, then separate
decoupling capacitors should be used for each converter.
The resolver connections should be made to the SIN and
COS inputs, REFERENCE I/P and SIGNAL GND as shown
in Figure 7 and described in the Connecting the Resolver
section.
The two signal ground wires from the resolver should be joined
at the SIGNAL GROUND pin of the resolver to minimize the
coupling between the sine and cosine signals. For this reason it
is also recommended that the resolver is connected using indi-
vidually screened twisted pair cables with the sine, cosine and
reference signals twisted separately.
SIGNAL GND and ANALOG GND are connected internally.
ANALOG GND and DIGITAL GND must be connected
externally.
The external components required should be connected as
shown in Figures 1a and 1b.
SIN I/P
SIGNAL GND
COS I/P
ANALOG GND
RIPPLE CLK
+12V
–12V
COMP
LOAD
16 DATA BITSBYTE
SELECT
GND
O/P
REFERENCE I/P
SIGNAL
ENABLEFigure 1a.AD2S82A Connection Diagram
SIN I/P
SIGNAL GND
COS I/P
RIPPLE CLK
+12V
–12V
8 DATA BITS
BYTE
SELECT
BUSYDIR
DIGITAL
GND
+5V
REFERENCE I/P
SIGNAL
ENABLEINHIBIT
HARMONIC DISTORTIONThe amount of harmonic distortion allowable on the signal and
reference lines is 10%.
Square waveforms can be used but the input levels should be
adjusted so that the average value is 1.9 V rms. (For example, a
square wave should be 1.9 V peak). Triangular and sawtooth
waveforms should have a amplitude of 2 V rms.
Note: The figure specified of 10% harmonic distortion is for
calibration convenience only.
POSITION OUTPUTThe resolver shaft position is represented at the converter out-
put by a natural binary parallel digital word.
As the digital position output of the converter passes through
the major carries, i.e., all “1s” to all “0s” or the converse, a
RIPPLE CLK logic output is initiated indicating that a revolu-
tion or a pitch of the input has been completed.
The direction of input rotation is indicated by the DIRECTION
(DIR) logic output. This direction data is always valid in ad-
vance of a RIPPLE CLK pulse and, as it is internally latched,
only changing state (1 LSB min change) with a corresponding
change in direction.
Both the RIPPLE CLK pulse and the DIR data are unaffected
by the application of the INHIBIT.
The static positional accuracy quoted is the worst case error that
can occur over the full operating temperature excluding the
effects of offset signals at the INTEGRATOR I/P (which can be
trimmed out–see Figures 1a and 1b), and with the following
conditions: input signal amplitudes are within 10% of the
nominal; phase shift between signal and reference is less than
10 degrees.
These operating conditions are selected primarily to establish a
repeatable acceptance test procedure which can be traced to
national standards. In practice, the AD2S81A/AD2S82A can be
used well outside these operating conditions providing the above
points are observed.
VELOCITY SIGNALThe tracking converter technique generates an internal signal at
the output of the integrator (the INTEGRATOR O/P pin) that
is proportional to the rate of change of the input angle. This is a
dc analog output referred to as the VELOCITY signal.
In many applications it is possible to use the velocity signal of
the AD2S81A/AD2S82A to replace a conventional
tachogenerator.
DC ERROR SIGNALThe signal at the output of the phase-sensitive detector (DEMOD
O/P) is the signal to be nulled by the tracking loop and is, there-
fore, proportional to the error between the input angle and the
output digital angle. This is the dc error of the converter; and as
the converter is a type 2 servo loop, it will increase if the output
fails to track the input for any reason. It is an indication that the
input has exceeded the maximum tracking rate of the converter
or, due to some internal malfunction, the converter is unable to
CONVERTER RESOLUTION (AD2S82A ONLY)Two major areas of the AD2S82A specification can be selected
by the user to optimize the total system performance. The reso-
lution of the digital output is set by the logic state of the inputs
SC1 and SC2 to be 10, 12, 14 or 16 bits and the dynamic char-
acteristics of bandwidth and tracking rate are selected by the
choice of external components.
The choice of the resolution will affect the values of R4 and R6
which scale the inputs to the integrator and the VCO, respec-
tively (see the Component Selection section). If the resolution is
changed, then new values of R4 and R6 must be switched into
the circuit.
Note: When changing resolution under dynamic conditions, do
it when the BUSY is low, i.e., when Data is not changing.
CONVERTER OPERATIONWhen connected in a circuit such as shown in Figure 1, the
AD2S81A/AD2S82A operates as a tracking resolver-to-digital
converter and forms a type 2 closed loop system. The output
will automatically follow the input for speeds up to the selected
maximum tracking rate. No convert command is necessary as
the conversion is automatically initiated by each LSB increment,
or decrement, of the input. Each LSB change of the converter
initiates a BUSY pulse.
The AD2S81A/AD2S82A is remarkably tolerant of input ampli-
tude and frequency variation because the conversion depends
only on the ratio of the input signals. Consequently there is no
need for accurate, stable oscillator to produce the reference
signal. The inclusion of the phase sensitive detector in the con-
version loop ensures a high immunity to signals that are not
coherent or are in quadrature with the reference signal.
SIGNAL CONDITIONINGThe amplitude of the SINE and COSINE signal inputs should
be maintained within 10% of the nominal values if full perfor-
mance is required from the velocity signal.
The digital position output is relatively insensitive to amplitude
variation. Increasing the input signal levels by more than 10%
will result in a loss in accuracy due to internal overload. Reduc-
ing levels will result in a steady decline in accuracy. With the
signal levels at 50% of the correct value, the angular error will
increase to an amount equivalent to 1.3 LSB. At this level the
repeatability will also degrade to 2 LSB and the dynamic re-
sponse will also change, since the dynamic characteristics are
proportional to the signal level.
The AD2S81A/AD2S82A will not be damaged if the signal
inputs are applied to the converter without the power supplies
and/or the reference.
REFERENCE INPUTThe amplitude of the reference signal applied to the converter’s
input is not critical, but care should be taken to ensure it is kept
within the recommended operating limits.
The AD2S81A/AD2S82A will not be damaged if the reference
is supplied to the converter without the power supplies and/or
the signal inputs.
AD2S81A/AD2S82A
COMPONENT SELECTIONThe following instructions describe how to select the external
components for the converter in order to achieve the required
bandwidth and tracking rate. In all cases the nearest “preferred
value’’ component should be used and a 5% tolerance will not
degrade the overall performance of the converter. Care should
be taken that the resistors and capacitors will function over the
required operating temperature range. The components should
be connected as shown in Figure 1.
PC compatible software is available to help users select the optimum
component values for the AD2S81A and AD2S82A, and display the
transfer gain, phase and small step response.
For more detailed information and explanation, see the Circuit
Functions and Dynamic Performance section.
1. HF Filter (R1, R2, C1, C2)
The function of the HF filter is to remove any dc offset and
to reduce the amount of noise present on the signal inputs
to the AD2S81A/AD2S82A, reaching the Phase Sensitive
Detector and affecting the outputs. R1 and C2 may be omit-
ted—in which case R2 = R3 and C1 = C3, calculated below—
but their use is particularly recommended if noise from
switch mode power supplies and brushless motor drive is
present.
Values should be chosen so that
and fREF = Reference Frequency (Hz)
This filter gives an attenuation of three times at the input to
the phase sensitive detector.Gain Scaling Resistor (R4)
If R1, C2 are fitted, then:
where 100 · 10 = current/LSB
If R1, C2 are not fitted, then:
where EDC= 160 · 10–3 for 10 bits resolution
= 40 · 10–3 for 12 bits
= 10 · 10–3 for 14 bits
= 2.5 · 10–3 for 16 bits
= Scaling of the DC ERROR in voltsAC Coupling of Reference Input (R3, C3)
Select R3 and C3 so that there is no significant phase shift at
the reference frequency. That is,Maximum Tracking Rate (R6)
The VCO input resistor R6 sets the maximum tracking rate
of the converter, and hence the velocity scaling as at the max
tracking rate, the velocity output will be 8 V.
Decide on your maximum tracking rate, “T,” in revolutions
per second. Note that “T” must not exceed the maximum
tracking rate or 1/16 of the reference frequency.
where n = bits per revolution
= 1,024 for 10 bits resolution
= 4,096 for 12 bits
= 16,384 for 14 bits
= 65,536 for 16 bitsClosed-Loop Bandwidth Selection (C4, C5, R5)Choose the closed-loop bandwidth (fBW) required
ensuring that the ratio of reference frequency to band-
width does exceed the following guidelines:
ResolutionRatio of Reference Frequency/Bandwidth2.5: 14: 16: 1 7.5: 1
Typical values may be 100 Hz for a 400 Hz reference fre-
quency and 500 Hz to 1000 Hz for a 5 kHz reference
frequency.Select C4 so that
with R6 in W and fBW, in Hz selected above.C5 is given by
d.R5 is given byVCO Phase Compensation
The following values of C6 and R7 should be fitted.Offset Adjust
Offsets and bias currents at the integrator input can cause an
additional positional offset at the output of the converter ofarc minute typical, 5.3 arc minutes maximum. If this can be
tolerated, then R8 and R9 can be omitted from the circuit.
If fitted, the following values of R8 and R9 should be used:
To adjust the zero offset, ensure the resolver is disconnected
and all the external components are fitted. Connect the COS
pin to the REFERENCE I/P and the SIN pin to the SIGNAL
GND and with the power and reference applied, adjust the
