AD2S80ASD/883B ,Variable Resolution/ Monolithic Resolver-to-Digital ConverterSPECIFICATIONSAD2S80AParameter Conditions Min Typ Max UnitsSIGNAL INPUTSFrequency 50 20,000 HzVolta ..
AD2S80ATD ,Variable Resolution, Monolithic Resolver-to-Digital ConverterVariable Resolution, MonolithicaResolver-to-Digital ConverterAD2S80A
AD2S80ATD/883B ,Variable Resolution, Monolithic Resolver-to-Digital ConverterSpecifications subject to change without notice.All min and max
AD2S80ATE ,Variable Resolution, Monolithic Resolver-to-Digital ConverterSpecifications subject to change without notice.All min and max
AD2S80AUD ,Variable Resolution, Monolithic Resolver-to-Digital ConverterVariable Resolution, MonolithicaResolver-to-Digital ConverterAD2S80A
AD2S81AJD ,Variable Resolution, Monolithic Resolver-to-Digital ConvertersFEATURESMonolithic (BiMOS ll) Tracking R/D ConverterINTEGRATORDEMOD DEMODRatiometric ConversionI/P ..
AD8542AR-REEL ,Dual Rail-to-Rail Input and Output, Single Supply Amplifier Featuring Very Low Supply CurrentCHARACTERISTICSOutput Voltage High V I = 1 mA 2.875 2.955 VOH L–40∞C £ T £ +125∞C 2.850 VA Output V ..
AD8542AR-REEL7 ,Dual Rail-to-Rail Input and Output, Single Supply Amplifier Featuring Very Low Supply CurrentCHARACTERISTICSOffset Voltage V 16 mVOS–40∞C £ T £ +125∞C7mVA Input Bias Current I 460 pAB–40∞C £ T ..
AD8542ARU ,General Purpose CMOS Rail-to-Rail AmplifiersAPPLICATIONSASIC Input or Output AmplifierSO-8 (R), RM-8, and RU-8 SO-14 (R) and RU-14Sensor Interf ..
AD8542ARUZ , General Purpose CMOS Rail-to-Rail Amplifiers
AD8544 ,Quad Rail-to-Rail Input and Output, Single Supply Amplifier Featuring Very Low Supply CurrentCHARACTERISTICSOffset Voltage V 16 mVOS–40°C ≤ T ≤ +125°C7mVA Input Bias Current I 460 pAB–40°C ≤ T ..
AD8544 ,Quad Rail-to-Rail Input and Output, Single Supply Amplifier Featuring Very Low Supply CurrentCHARACTERISTICSOutput Voltage High V I = 1 mA 2.875 2.955 VOH L–40°C ≤ T ≤ +125°C 2.850 VA Output V ..
AD2S80ASD/883B
Variable Resolution/ Monolithic Resolver-to-Digital Converter
REV.A
Variable Resolution, Monolithic
Resolver-to-Digital Converter
FEATURES
Monolithic (BiMOS ll) Tracking R/D Converter
40-Pin DIP Package
44-Pin LCC Package
10-,12-,14- and 16-Bit Resolution Set by User
Ratiometric Conversion
Low Power Consumption: 300 mW typ
Dynamic Performance Set by User
High Max Tracking Rate 1040 RPS (10 Bits)
Velocity Output
Industrial Temperature Range Versions
Military Temperature Range Versions
ESD Class 2 Protection (2,000 V min)
/883 B Parts Available
APPLICATIONS
DC Brushless and AC Motor Control
Process Control
Numerical Control of Machine Tools
Robotics
Axis Control
Military Servo Control
GENERAL DESCRIPTIONThe AD2S80A is a monolithic 10-, 12-, 14- or 16-bit tracking
resolver-to-digital converter contained in a 40-pin DIP or 44-
pin LCC ceramic package. It is manufactured on a BiMOS II
process that combines the advantages of CMOS logic and bipo-
lar high accuracy linear circuits on the same chip.
The converter allows users to select their own resolution and dy-
namic performance with external components. This allows the users
great flexibility in defining the converter that best suits their sys-
tem requirements. The converter allows users to select the reso-
lution to he 10, 12, 14 or 16 bits and to track resolver signals
rotating at up to 1040 revs per second (62,400 rpm) when set to
10-bit resolution.
The AD2S80A converts resolver format input signals into a par-
allel natural binary digital word using a ratiometric tracking con-
version method. This ensures high-noise immunity and tolerance
of lead length when the converter is remote from the resolver.
The 10-, 12-, 14- or 16-bit output word is in a three-state digi-
tal logic available in 2 bytes on the 16 output data lines. BYTE
SELECT, ENABLE and INHIBIT pins ensure easy data trans-
fer to 8- and 16-bit data buses, and outputs are provided to al-
low for cycle or pitch counting in external counters.
An analog signal proportional to velocity is also available and
can be used to replace a tachogenerator.
The AD2S80A operates over 50 Hz to 20,000 Hz reference
frequency.
FUNCTIONAL BLOCK DIAGRAM
PRODUCT HIGHLIGHTS
Monolithic. A one chip solution reduces the package size re-quired and increases the reliability.
Resolution Set by User. Two control pins are used to selectthe resolution of the AD2S80A to be 10, 12, 14 or 16 bits al-
lowing the user to use the AD2S80A with the optimum resolu-
tion for each application.
Ratiometric Tracking Conversion. Conversion techniqueprovides continuous output position data without conversion
delay and is insensitive to absolute signal levels. It also provides
good noise immunity and tolerance to harmonic distortion on
the reference and input signals.
Dynamic Performance Set by the User. By selecting exter-nal resistor and capacitor values the user can determine band-
width, maximum tracking rate and velocity scaling of the
converter to match the system requirements. The external com-
ponents required are all low cost preferred value resistors and
capacitors, and the component values are easy to select using
the simple instructions given.
Velocity Output. An analog signal proportional to velocity isavailable and is linear to typically one percent. This can be used
in place of a velocity transducer in many applications to provide
loop stabilization in servo controls and velocity feedback data.
Low Power Consumption. Typically only 300 mW.
Military Product. The AD2S80A is available processed in ac-cordance with MIL-STD-883B, Class B.
MODELS AVAILABLEInformation on the models available is given in the section
“Ordering Information.”
AD2S80A
SIN I/P
SIG GND
COS I/P
ANALOGGND
RIPPLE
CLK
+12V
–12V
DATA
LOAD
SC1
SC2
ENABLE
16 DATA BITS
BYTE
SELECT
+5V
DIG GND
DIR
INHIBIT
INTEGRATOR
O/P
VCO I/P
INTEGRATORI/P
DEMODO/PDEMODI/P
AC ERRORO/P
BUSY
AD2S80A–SPECIFICATIONSACCURACY
VELOCITY SIGNAL
(typical at +258C unless otherwise noted)
BUSY
DIGITAL INPUTS
DIGITAL INPUTS
DIGITAL OUTPUTS
NOTESRefer to small signal bandwidth.
AD2S80A
AD2S80A–SPECIFICATIONSPHASE SENSITIVE DETECTOR
POWER SUPPLIES
Specification subject to change without notice.
All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test.
(typical at +258C unless otherwise noted)
ESD SENSITIVITYThe AD2S80A features an input protection circuit consisting of large “distributed” diodes and
polysilicon series resistors to dissipate both high energy discharges (Human Body Model) and
fast, low energy pulses (Charges Device Model).
The AD2S80A is ESD protection Class II (2000 V min). Proper ESD precautions are strongly
recommended to avoid functional damage or performance degradation. For further information
RECOMMENDED OPERATING CONDITIONSPower Supply Voltage (+VS, –VS) . . . . . . . . .±12 V dc ± 10%
Power Supply Voltage VL . . . . . . . . . . . . . . . . .+5 V dc ± 10%
Analog Input Voltage (SIN and COS) . . . . . . .2 V rms ± 10%
Analog Input Voltage (REF) . . . . . . . . . . . . . .1 V to 8 V peak
Signal and Reference Harmonic Distortion . . . . . . .10% (max)
PhaseShiftBetweenSignalandReference . . .±10 Degrees(max)
Ambient Operating Temperature Range
Commercial (JD, KD, LD) . . . . . . . . . . . . . .0°C to +70°C
Industrial (AD, BD) . . . . . . . . . . . . . . . . . . .–40°C to +85°C
Extended (SD, SE, TD, TE, UD, UE) . . . –55°C to +125°C
ABSOLUTE MAXIMUM RATINGSl (with respect to GND)+VS2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V dc
–VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–14 V dc
+VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+VS
Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
SIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
COS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
Any Logical Input .. . . . . . . . . . . . . . . . . . .–0.4 V dc to +VL dc
Demodulator Input . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
Integrator Input . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
VCO Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+14 V to –VS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . .860 mW
Operating Temperature
Commercial (JD, KD, LD) . . . . . . . . . . . . . .0°C to +70°C
Industrial (AD, BD) . . . . . . . . . . . . . . . . . . .–40°C to +85°C
Extended (SD, SE, TD, TE, UD, UE) . . . –55°C to +125°C
θJC3 (40-Pin DIP 883 Parts Only) . . . . . . . . . . . . . . . .11°C/W
θJC3 (44-Pin LCC 883 Parts Only) . . . . . . . . . . . . . . . .10°C/W
Storage Temperature (All Grades) . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . .+300°C
CAUTION:Absolute Maximum Ratings are those values beyond which damage to the device
may occur.Correct polarity voltages must be maintained on the +VS and –VS pins.With reference to Appendix C of MIL-M-38510.
Bit Weight Table
PIN CONFIGURATIONS
PIN DESIGNATIONS
NC = NO CONNECT
SIN
+VS
DB2
MSB DB1
–VS
RIPPLE CLOCK
DATA LOAD
DIRECTION
BUSY
SC2
DIGITAL GND
SC1
INHIBIT
DB4
DB3
DB6
DB5
DB8
DB72444434241405619242320222128272625
DB9
DB10DB13DB11DB12DB15DB14
LSB DB16
BYTE SELECT
SIGNAL GNDANALOG GNDDEMOD I/PCOS
AC ERROR O/P
DEMOD O/P
REFERENCE I/PINTEGRATOR I/PINTEGRATOR O/P
VCO I/PNC
ENABLE
LCC (E) Package
DIP (D) Package
AD2S80A
CONNECTING THE CONVERTERThe power supply voltages connected to +VS and –VS pins
should be +12 V dc and –12 V dc and must not be reversed.
The voltage applied to VL can be +5 V dc to +VS.
It is recommended that the decoupling capacitors are connected
in parallel between the power lines +VS, –VS and ANALOG
GROUND adjacent to the converter. Recommended values are
100 nF (ceramic) and 10 μF (tantalum). Also capacitors of
100 nF and 10 μF should be connected between +VL and
DIGITAL GROUND adjacent to the converter.
When more than one converter is used on a card, then separate
decoupling capacitors should be used for each converter.
The resolver connections should be made to the SIN and COS
inputs, REFERENCE INPUT and SIGNAL GROUND as
shown in Figure 7 and described in section “CONNECTING
THE RESOLVER.”
The two signal ground wires from the resolver should be joined
at the SIGNAL GROUND pin of the converter to minimize the
coupling between the sine and cosine signals. For this reason it
is also recommended that the resolver is connected using indi-
vidually screened twisted pair cables with the sine, cosine and
reference signals twisted separately.
SIGNAL GROUND and ANALOG GROUND are connected
internally. ANALOG GROUND and DIGITAL GROUND
must be connected externally.
The external components required should be connected as
shown in Figure 1.
CONVERTER RESOLUTIONTwo major areas of the AD2S80A specification can be selected
by the user to optimize the total system performance. The reso-
lution of the digital output is set by the logic state of the inputs
SC1 and SC2 to be 10, 12, 14 or 16 bits; and the dynamic char-
acteristics of bandwidth and tracking rate are selected by the
choice of external components.
The choice of the resolution will affect the values of R4 and R6
which scale the inputs to the integrator and the VCO respec-
tively (see section COMPONENT SELECTION). If the resolu-
tion is changed, then new values of R4 and R6 must be switched
into the circuit.
Note:When changing resolution under dynamic conditions, do
it when the BUSY is low, i.e., when Data is not changing.
DEMOD
I/P
DEMOD
O/P
INTEGRATOR
O/PAD2S80A
HF FILTER
INTEGRATOR
I/P
–12V+12V
OFFSET ADJUST
AC ERROR O/P
REFERENCE
I/P
BANDWIDTH
SELECTION
TRACKING
RATE
SELECTION
VELOCITY
SIGNAL
VCO
I/P
SC1SC2DATA
LOAD
ENABLE16 DATA BITS
BYTE
SELECT
+5VDIG
GND
BUSYDIRNINHIBIT
SIN
SIG GND
COS
GND
RIPPLE
CLK
+12V
–12VFigure 1.AD2S80A Connection Diagram
CONVERTER OPERATIONWhen connected in a circuit such as shown in Figure 1 the
AD2S80A operates as a tracking resolver-to-digital converter
and forms a Type 2 closed-loop system. The output will auto-
matically follow the input for speeds up to the selected maxi-
mum tracking rate. No convert command is necessary as the
conversion is automatically initiated by each LSB increment, or
decrement, of the input. Each LSB change of the converter ini-
tiates a BUSY pulse.
The AD2S80A is remarkably tolerant of input amplitude and
frequency variation because the conversion depends only on the
ratio of the input signals. Consequently there is no need for ac-
curate, stable oscillator to produce the reference signal. The in-
clusion of the phase sensitive detector in the conversion loop
ensures a high immunity to signals that are not coherent or are
in quadrature with the reference signal.
SIGNAL CONDITIONINGThe amplitude of the SINE and COSINE signal inputs should
be maintained within 10% of the nominal values if full perfor-
mance is required from the velocity signal.
The digital position output is relatively insensitive to amplitude
variation. Increasing the input signal levels by more than 10%
will result in a loss in accuracy due to internal overload. Reduc-
ing levels will result in a steady decline in accuracy. With the
signal levels at 50% of the correct value, the angular error will
increase to an amount equivalent to 1.3 LSB. At this level the
repeatability will also degrade to 2 LSB and the dynamic re-
sponse will also change, since the dynamic characteristics are
proportional to the signal level.
The AD2S80A will not be damaged if the signal inputs are
applied to the converter without the power supplies and/or the
reference.
REFERENCE INPUTThe amplitude of the reference signal applied to the converter’s
input is not critical, but care should be taken to ensure it is kept
within the recommended operating limits.
The AD2S80A will not be damaged if the reference is supplied
to the converter without the power supplies and/or the signal
inputs.
HARMONIC DISTORTIONThe amount of harmonic distortion allowable on the signal and
reference lines is 10%.
Square waveforms can be used but the input levels should be
adjusted so that the average value is 1.9 V rms. (For example, a
square wave should be 1.9 V peak.) Triangular and sawtooth
waveforms should have a amplitude of 2 V rms.
Note: The figure specified of 10% harmonic distortion is for
calibration convenience only.
POSITION OUTPUTThe resolver shaft position is represented at the converter out-
put by a natural binary parallel digital word. As the digital posi-
tion output of the converter passes through the major carries,
i.e., all “1s” to all “0s” or the converse, a RIPPLE CLOCK
(RC) logic output is initiated indicating that a revolution or a
pitch of the input has been completed.
The direction of input rotation is indicated by the DIRECTION
(DIR) logic output. This direction data is always valid in ad-
vance of a RIPPLE CLOCK pulse and, as it is internally
latched, only changing state (1 LSB min change) with a corre-
sponding change in direction.
Both the RIPPLE CLOCK pulse and the DIRECTION data
are unaffected by the application of the INHIBIT. The static
positional accuracy quoted is the worst case error that can occur
over the full operating temperature excluding the effects of off-
set signals at the INTEGRATOR INPUT (which can be
trimmed out—see Figure 1), and with the following conditions:
input signal amplitudes are within 10% of the nominal; phase
shift between signal and reference is less than 10 degrees.
These operating conditions are selected primarily to establish a
repeatable acceptance test procedure which can be traced to na-
tional standards. In practice, the AD2S80A can be used well
outside these operating conditions providing the above points
are observed.
VELOCITY SIGNALThe tracking converter technique generates an internal signal at
the output of the integrator (the INTEGRATOR OUTPUT
pin) that is proportional to the rate of change of the input angle.
This is a dc analog output referred to as the VELOCITY signal.
In many applications it is possible to use the velocity signal of
the AD2S80A to replace a conventional tachogenerator.
DC ERROR SIGNALThe signal at the output of the phase sensitive detector (DE-
MODULATOR OUTPUT) is the signal to be nulled by the
tracking loop and is, therefore, proportional to the error be-
tween the input angle and the output digital angle. This is the
dc error of the converter; and as the converter is a Type 2 servo
loop, it will increase if the output fails to track the input for any
reason. It is an indication that the input has exceeded the maxi-
mum tracking rate of the converter or, due to some internal
malfunction, the converter is unable to reach a null. By connect-
ing two external comparators, this voltage can be used as a
“built-in-test.”
AD2S80A
COMPONENT SELECTIONThe following instructions describe how to select the external
components for the converter in order to achieve the required
bandwidth and tracking rate. In all cases the nearest “preferred
value” component should be used, and a 5% tolerance will not
degrade the overall performance of the converter. Care should
be taken that the resistors and capacitors will function over the
required operating temperature range. The components should
be connected as shown in Figure 1.
PG compatible software is available to help users select the optimum
component values for the AD2S80A, and display the transfer gain,
phase and small step response.
For more detailed information and explanation, see section “CIR-
CUIT FUNCTIONS AND DYNAMIC PERFORMANCE.”
1. HF Filter (R1, R2, C1, C2)
The function of the HF filter is to remove any dc offset and
to reduce the amount of noise present on the signal inputs to
the AD2S80A, reaching the Phase Sensitive Detector and af-
fecting the outputs. R1 and C2 may be omitted—in which
case R2 = R3 and C1 = C3, calculated below—but their use
is particularly recommended if noise from switch mode power
supplies and brushless motor drive is present.
Values should be chosen so that
kΩ≤R1=R2≤56kΩ
C1=C21πR1fREF
and fREF = Reference frequency (Hz)
This filter gives an attenuation of three times at the input to
the phase sensitive detector.Gain Scaling Resistor (R4)
If R1, C2 arc fitted then: R4=EDC
100×10±9×1Ω
where 100 × 10–9 = current/LSB
If R1, C2 are not fitted then:
=EDC
100×10±9Ω
where EDC= 160 × 10–3 for 10 bits resolution
= 40 × 10–3 for 12 bits
= 10 × 10–3 for 14 bits
= 2.5 × 10–3 for 16 bits
= Scaling of the DC ERROR in voltsAC Coupling of Reference Input (R3, C3)
Select R3 and C3 so that there is no significant phase shift at
the reference frequency. That is,=100kΩMaximum Tracking Rate (R6)
The VCO input resistor R6 sets the maximum tracking rate
of the converter and hence the velocity scaling as at the max
tracking rate, the velocity output will be 8 V.
Decide on your maximum tracking rate, “T,” in revolutions
per second. Note that “T” must not exceed the maximum
tracking rate or 1/16 of the reference frequency. =6.32×1010×nΩ
where n = bits per revolution
= 1,024 for 10 bits resolution
= 4,096 for 12 bits
= 16,384 for 14 bits
= 65,536 for 16 bitsClosed-Loop Bandwidth Selection (C4, C5, R5)Choose the closed-loop bandwidth (fBW) required
ensuring that the ratio of reference frequency to band-
width does not exceed the following guidelines:
ResolutionRatio of Reference Frequency/Bandwidth2.5: 14: 16: 17.5: 1
Typical values may be 100 Hz for a 400 Hz reference fre-
quency and 500 Hz to 1000 Hz for a 5 kHz reference
frequency.Select C4 so that
=21
R6×fBW2F
with R6 in Ω and fBW, in Hz selected above.C5 is given by
C5=5×C4
d.R5 is given by
=4
2×π×fBW×C5VCO Phase Compensation
The following values of C6 and R7 should be fitted. C6=470pF,R7=68ΩOffset Adjust
Offsets and bias currents at the integrator input can cause an
additional positional offset at the output of the converter of 1
arc minute typical, 5.3 arc minutes maximum. If this can be
tolerated, then R8 and R9 can be omitted from the circuit.
If fitted, the following values of R8 and R9 should be used:
R8=4.7MΩ,R9=1MΩpotentiometer
To adjust the zero offset, ensure the resolver is disconnected
and all the external components are fitted. Connect the COS
pin to the REFERENCE INPUT and the SIN pin to the
SIGNAL GROUND and with the power and reference ap-
