AD2S105AP ,Three-Phase Current ConditionerGENERAL DESCRIPTION2The AD2S105 performs the vector rotation of three-phase 120 The AD2S105 is fabr ..
AD2S1200WST ,12-Bit R/D Converter with Reference OscillatorAPPLICATIONS binary position data accessed either via a 12-bit parallel Electric power steering por ..
AD2S1200YST ,12-Bit R/D Converter with Reference OscillatorFEATURES Complete monolithic R/D converter The AD2S1200 is a complete 12-bit resolution tracking re ..
AD2S1205WSTZ , 12-Bit R/D Converter with Reference Oscillator
AD2S1210BSTZ , Variable Resolution, 10-Bit to 16-Bit R/D Converter with Reference Oscillator
AD2S44TM18B ,Low Cost, 14-Bit, Dual Channel Synchro/Resolver-to-Digital Converter
AD8541ART ,General Purpose CMOS Rail-to-Rail AmplifiersCHARACTERISTICSOffset Voltage V 16 mVOS–40°C ≤ T ≤ +125°C7mVA Input Bias Current I 460 pAB–40°C ≤ T ..
AD8542 ,Dual Rail-to-Rail Input and Output, Single Supply Amplifier Featuring Very Low Supply Currentapplications with high source impedance. Sup-V– 4 5+IN Bply current is only 45 µA per amplifier, id ..
AD8542AR ,General Purpose CMOS Rail-to-Rail AmplifiersGENERAL DESCRIPTIONThe AD8541/AD8542/AD8544 are single, dual and quad rail-to-rail input and output ..
AD8542ARM ,General Purpose CMOS Rail-to-Rail AmplifiersFEATURESSingle Supply Operation: +2.7 V to +5.5 VSO-8 (R) SOT-23-5 (RT)Low Supply Current: 45 A/Am ..
AD8542ARM ,General Purpose CMOS Rail-to-Rail AmplifiersCHARACTERISTICSOffset Voltage V 16 mVOS–40°C ≤ T ≤ +125°C7mVA Input Bias Current I 460 pAB–40°C ≤ T ..
AD8542ARM ,General Purpose CMOS Rail-to-Rail AmplifiersCHARACTERISTICSOffset Voltage V 16 mVOS–40°C ≤ T ≤ +125°C7mVA Input Bias Current I 460 pAB–40°C ≤ T ..
AD2S105AP
Three-Phase Current Conditioner
REV.0
FEATURES
Current Conditioning
Complete Vector Transformation on Silicon
Three-Phase 120° and Orthogonal 90° Signal
Transformation
Three-Phase Balance Diagnostic–Homopolar Output
DQ Manipulation
Real-Time Filtering
APPLICATIONS
AC Induction Motor Control
Spindle Drive Control
Pump Drive Control
Compressor Drive Control and Diagnostics
Harmonic Measurement
Frequency Analysis
Three-Phase Power Measurement
Three-Phase
Current Conditioner
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTIONThe AD2S105 performs the vector rotation of three-phase 120
degree or two-phase 90 degree sine and cosine signals by trans-
ferring these inputs into a new reference frame which is controlled
by the digital input angle φ. Two transforms are included in the
AD2S105. The first is the Clarke transform which computes
the sine and cosine orthogonal components of a three-phase in-
put. These signals represent real and imaginary components
which then form the input to the Park transform. The Park
transform relates the angle of the input signals to a reference
frame controlled by the digital input port. The digital input
port on the AD2S105 is a 12-bit/parallel natural binary port.
If the input signals are represented by Vds and Vqs, respectively,
where Vds and Vqs are the real and imaginary components, then
the transformation can be described as follows:
Vds' = Vds Cosφ – Vqs Sinφ
Vqs' = Vds Sinφ + Vqs Cosφ
Where Vds' and Vqs' are the output of the Park transform
and Sinφ, and Cosφ are the trigonometric values internally cal-
culated by the AD2S105 from the binary digital data φ.
The input section of the device can be configured to accept
either three-phase inputs, two-phase inputs of a three-phase
system, or two 90 degree input signals. The homopolar output
indicates an imbalance of a three-phase input only at a user-
specified level.
The digital input section will accept a resolution of up to 12 bits.inputdatastrobesignalisrequiredtosynchronizetheposition
dataandload thisinformationinto the device counters.
AD2S105–SPECIFICATIONSVECTOR PERFORMANCE
ANALOG SIGNAL OUTPUTS
STROBE
BUSY
DIGITAL INPUTS
CONV MODE
(VDD = +5 V ± 5%; VSS = –5 V ± 5% AGND = DGND = O V;
TA = –40°C to +85°C, unless otherwise noted)
AD2S105NOTESAngular accuracy includes offset and gain errors, measured with a stationary digital input and maximum analog frequency inputs.The angular error does not include the additional error caused by the phase delay as a function of input frequency. For example, if fINPUT = 600 Hz, the contribution
to the error due to phase delay is: 650 ns × fINPUT × 60 × 360 = 8.4 arc minutes.Output subject to input voltage and gain.
Specifications subject to change without notice.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD2S105 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
RECOMMENDED OPERATING CONDITIONSPower Supply Voltage (+VDD, –VSS) . . . . . . . . .±5 V dc ± 5%
Analog Input Voltage (PH/IP1, 2, 3, 4) . . . . . .2 V rms ± 10%
Analog Input Voltage (PH/IPH1, 2, 3) . . . . . .3 V rms ± 10%
Ambient Operating Temperature Range
Industrial (AP) . . . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C
ABSOLUTE MAXIMUM RATINGS (TA = +25°C)VDD to AGND . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +7 V dc
VSS to AGND . . . . . . . . . . . . . . . . . . . . . . .+0.3 V to –7 V dc
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . .±0.3 V dc
Analog Input Voltage to AGND . . . . . . . . . . . . . . .VSS to VDD
Digital Input Voltage to DGND . . . .–0.3 V to VDD + 0.3 V dc
Digital Output Voltage to DGND . . . . . .–0.3 V to VDD + V dc
Analog Output Voltage to AGND
. . . . . . . . . . . . . . . . . . . . . .VSS – 0.3 V to VDD + 0.3 V dc
Analog Output Load Condition (PH/OP1, 4
Sinθ, Cosθ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 kΩ
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . .140 mW
Operating Temperature
Industrial (AP) . . . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . .+300°C
CAUTION1.Absolute Maximum Ratings are those values beyond which
damage to the device will occur.
2.Correct polarity voltages must be maintained on the +VDD
and –VSS pins
ORDERING GUIDE*P = Plastic Leaded Chip Carrier.
AD2S105
PIN DESIGNATIONS1, 2, 3NOTES90° orthogonal signals = Sin θ, Cos θ (Resolver) = PH/IP4 and PH/IP1.Three phase, 120°, three-wire signals = Cos θ, Cos (θ + 120°), Cos (θ + 240°).
= PH/IP1, PH/IP2, PH/IP3
High Level = PH/IPH1, PH/IPH2, PH/IPH3.Three Phase, 120°, two-wire signals = Cos (θ + 120°), Cos (θ + 240°) =
PH/IP2, PH/IP3.
In all cases where any of the input Pins 11 through 17 are not used, they must
be left unconnected.
PIN CONFIGURATION
THEORY OF OPERATIONA fundamental requirement for high quality induction motor
drives is that the magnitude and position of the rotating air-gap
rotor flux be known. This is normally carried out by measuring
the rotor position via a position sensor and establishing a rotor
oriented reference frame.
To generate a flux component in the rotor, stator current is ap-
plied. A build-up of rotor flux is concluded which must be
maintained by controlling the stator current, ids, parallel to the
rotor flux. The rotor flux current component is the magnetizing
current, imr.
Torque is generated by applying a current component which is
perpendicular to the magnetizing current. This current is nor-
mally called the torque generating current, iqs.
To orient and control both the torque and flux stator current
vectors, a coordinate transformation is carried out to establish a
new reference frame related to the rotor. This complex calcula-
tion is carried out by the AD2S105.
To expand upon the vector operator a description of a single
vector rotation is of assistance. If it is considered that the
moduli of a vector is OP and that through the movement of ro-
tor position by f, we require the new position of this vector it
can be deduced as follows:
Let original vector OP = A (Cos u + jSIN u) where A is a
constant;
if OQ = OP ejF(1)
and: ejF = Cos f + jSin f
OQ = A (Cos (u + f) + jSin (u + f))
= A [Cos u Cos φ – Sin u Sin φ + jSin u Cos φ + jCos u Sin φ]
= A [(Cos u + jSin u) (Cos f + jSin f)](2)
Figure 1.Vector Rotation in Polar Coordinate
The complex stator current vector can be represented as is = ias
+ aibs + a2ics where a = e
j2π and a2 = e
j4π. This can be re-
placed by rectangular coordinates as
is = ids + jiqs(3)
In this equation ids and iqs represent the equivalent of a two-
phase stator winding which establishes the same magnitude of
MMF in a three-phase system. These inputs can be seen after
the three-phase to two-phase transformation in the AD2S105
To relate these stator current to the reference frame the rotor
currents assume the same rectangular coordinates, but are now
rotated by the operator ejf, where ejf = Cos f + jSin f.
Here the term vector rotator comes into play where the stator
current vector can be represented in rotor-based coordinates or
vice versa.
The AD2S105 uses ejf as the core operator. In terms of the
mathematical function, it rotates the orthogonal ids and iqs com-
ponents as follows:
ids' + jiqs' = (Ids + jIqs) ejf
where ids', iqs' = stator currents in the rotor reference frame. Andjf = Cos f + jSin f
= (Ids + jIqs)(Cos f + jSin f)
The output from the AD2S105 takes the form of:
ids' = Ids Cos f – Iqs Sin f
iqs' = Ids Sin f + Iqs Cos f
The matrix equation is:
ids']=[
Cos f – Sin f][
Ids]
iqs'
Sin f
Cos f Iqs
and it is shown in Figure 2.
Figure 2.
AD2S105
ANALOG SIGNAL INPUT AND OUTPUT CONNECTIONS
Input Analog SignalsAll analog signal inputs to AD2S105 are voltages. There are two
different voltage levels of three-phase (0°, 120°, 240°) signal in-
puts. One is the nominal level, which is ±2.8 V dc or 2 V rms
and the corresponding input pins are PH/IP1 (Pin 17), PH/IP2
(Pin 15), PH/IP3 (Pin 13) and PH/IP4 (Pin 11).
The high level inputs can accommodate voltages from nominal
up to a maximum of ±VDD/VSS. The corresponding input pins
are PH/IPH1 (Pin 16), PH/IPH2 (Pin 14) and PH/IPH3 (Pin
12). The homopolar output can only be used in the three-phase
connection mode.
The converter can accept both two-phase format and three-
phase format input signals. For the two-phase format input, the
two inputs must be orthogonal to each other. For the three-
phase format input, there is the choice of using all three inputs
or using two of the three inputs. In the latter case, the third in-
put signal will be generated internally by using the information
of other two inputs. The high level input mode, however, can
only be selected with three-phase/three-input format. All these
different conversion modes, including nominal/high input level
and two/three-phase input format can be selected using two se-
lect pins (Pin 23, Pin 24). The functions are summarized in
Table I.
Table I.Conversion Mode Selection*The high level input mode can only be selected with MODE2.
MODE1: 2-Phase/2 Inputs with Nominal Input LevelIn this mode, PH/IP1 and PH/IP4 are the inputs and the Pins
12 through 16 must be left unconnected.
MODE2: 3-Phase/3 Inputs with Nominal/High Input LevelIn this mode, either nominal or high level inputs can be used.
For nominal level input operation, PH/IP1, PH/IP2 and PH/IP3
are the inputs, and there should be no connections to PH/IPH1,
PH/IPH2 and PH/IPH3; similarly, for high level input opera-
tion, the PH/IPH1, PH/IPH2 and PH/IPH3 are the inputs, and
there should be no connections to PH/IP1, PH/IP2 and PH/IP3.
In both cases, the PH/IP4 should be left unconnected. For high
level signal input operation, select MODE2 only.
MODE3: 3-Phase/2 Inputs with Nominal Input LevelIn this mode, PH/IP2 and PH/IP3 are the inputs and the third
signal will be generated internally by using the information of
other two inputs. It is recommended that PH/IP1, PH/IPH1,
PH/IPH2, PH/IP4 and PH/IPH3 should be left unconnected.
CONVERTER OPERATIONThe architecture of the AD2S105 is illustrated in Figure 3. The
AD2S105 is configured in the forward transformation which ro-
tates the stator coordinates to the rotor reference frame.
Vector RotationPosition data, f, is loaded into the input latch on the positive
edge of the strobe pulse. (For detail on the timing, please refer
to the “timing diagram.”) The negative edge of the strobe signi-
fies that conversion has commenced. A busy pulse is subse-
quently produced as data is passed from the input latches to the
Sin and Cos multipliers. During the loading of the multiplier,
the busy pulse remains high preventing further updates of f in
both the Sin and Cos registers.
The negative edge of the busy pulse signifies that the multipliers
are set up and the orthogonal analog inputs are then multiplied
real time. The resultant two outputs are accessed via the
PH/OP1 (Pin 7) and PH/OP4 (Pin 6).
For other configurations, please refer to “Transformation
Configuration.”
CONNECTING THE CONVERTER
Power Supply ConnectionThe power supply voltages connected to VDD and VSS pins
should be +5 V dc and –5 V dc and must not be reversed. Pin 4
(VDD) and Pin 41 (VDD) should both be connected to +5 V;
similarly, Pin 5 (VSS) and Pin 19 (VSS) should both be con-
nected to –5 V dc.
It is recommended that decoupling capacitors, 100 nF (ceramic)
and 10 μF (tantalum) or other high quality capacitors, are con-
nected in parallel between the power line VDD, VSS and AGND
adjacent to the converter. Separate decoupling capacitors should
be used for each converter. The connections are shown in Fig-
ure 4.
Figure 4.AD2S105 Power Supply Connection