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AD1981AJST
AC ?7 SoundMAX Codec
REV.0
AC ‘97 SoundMAXCodec
FUNCTIONAL BLOCK DIAGRAM
AC ’97 2.2-COMPLIANT CODEC
FEATURES
S/PDIF Output, 20 Bits Data Format, Supporting
48 kHz and 44.1 kHz Sample Rates
Integrated Stereo Headphone Amplifier
Variable Sample Rate Audio
External Audio Power-Down Control
Greater than 90 dB Dynamic Range
16-Bit Stereo Full-Duplex Codec
20-Bit DAC Input
Three Analog Line-Level Stereo Inputs for
LINE-IN, AUX, and CD
Mono Line-Level Phone Input
Mono MIC Input with Built-In Programmable Preamp
High Quality CD Input with Ground Sense
Mono Output for Speakerphone or Internal Speaker
Power Management Support
48-Lead LQFP Package
ENHANCED FEATURES
Built-in Digital Equalizer Function for Optimized
Speaker Sound
Full Duplex Variable Sample Rates from 7040 Hz to 48 kHz
with 1 Hz Resolution
Jack Sense Pins Provide Automatic Output Switching
Software-Programmed VREFOUT Output for Microphone
Bias and External Power Amp
Split Power Supplies: 3.3 V Digital and 5 V Analog
Multiple Codec Configuration OptionsSoundMAX is a registered trademark of Analog Devices, Inc.
MIC_IN
CD_L
CD_GND
CD_R
LINE_IN
HP_OUT_L
LINE_OUT_L
MONO_OUT
LINE_OUT_R
HP_OUT_R
AUX
PHONE_IN
JS0JS1
VREFOUTXTL_OUTXTL_INID1ID0
’97 LINK SIGNALS
SPDIF
EAPD
VREF
KEY:
G = GAIN
A = ATTENUATE
M = MUTE
AD1981A–SPECIFICATIONSPROGRAMMABLE GAIN AMPLIFIER—ADC
DIGITAL DECIMATION AND INTERPOLATION FILTERS
STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTEDTemperature25°C
Digital Supply (DVDD)3.3 V
Analog Supply (VDD)5.0 V
Sample Rate (FS)48 kHz
Input Signal1008 Hz
Analog Output Pass Band20 Hz to 20 kHz
VIH2.0 V
VIL0.8 V
VIH (ID0, ID1)4.0 V
VIL (ID0, ID1)1.0 V
DAC Test Conditions
Calibrated
0 dB Gain/Attenuation Relative to Full Scale
0 dB Input
10 kΩ Output Load (LINE_OUT)
32 Ω Output Load (HP_OUT)
ADC Test Conditions
Calibrated
0 dB Gain
Input –3.0 dB Relative to Full Scale
AD1981A
SPECIFICATIONSANALOG OUTPUT
AD1981A–SPECIFICATIONSNOTESGuaranteed but not tested.Measurement reflects main ADC.Values presented with VREFOUT not loaded.
Specifications subject to change without notice.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD1981A features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE*ST = Thin Quad Flatpack
ABSOLUTE MAXIMUM RATINGS*(TA = 25°C unless otherwise noted.)
Power Supplies
Digital (DVDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +3.6 V
Analog (AVDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6.0 V
Input Current (except Supply Pins) . . . . . . . . . . . . . . .±10 mA
Signals Pins
Digital Input Voltage . . . . . . . . . . . . .–0.3 V to DVDD +0.3 V
Analog Input Voltage . . . . . . . . . . . .–0.3 V to AVDD +0.3 V
Ambient Temperature Range (Operating) . . . . . . .0°C to 70°C
Ambient Temperature Rating (TQFP Package)
TAMB = TCASE – ( PD � �CA )
TCASE = Case Temperature in °C
PD = Power Dissipation in W
�JA Thermal Resistance (Junction-to-Ambient) . . .76.2°C/W
�JC Thermal Resistance (Junction-to-Case) . . . . . . . 17°C/W
�JA Thermal Resistance (Case-to-Ambient) . . . . . 52.2°C/W
Storage Temperature Range . . . . . . . . . . . .–65°C to +150°C
*Stresses greater than those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
AD1981A
PIN CONFIGURATION
LINE_OUT_R
LINE_OUT_L
AVDD4
AVSS4
AFILT4
AFILT3
AFILT2
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
NC = NO CONNECT
SDATA_IN
DVDD2
SYNC
RESET
AFILT1
VREFOUT
VREF
AVSS1AVDD1
SPDIFEAPDID1ID0AV
SS3
DD3HP_OUT_RAV
SS2
HP_OUT_LAV
DD2
MONO_OUT
PHONE_IN
JS1JS0
CD_L
CD_GND_REF
CD_R
MIC_IN
LINE_IN_L
LINE_IN_R
PIN FUNCTION DESCRIPTIONS
AD1981A
Indexed Control RegistersNOTES
All registers not shown. Bits containing an X are assumed to be reserved.
Odd registers are reserved, not aliased.
Reserved registers should not be written to.
Zeros should be written to bits containing an X.
*For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT Bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
Reset (Index 00h)Writing any value to this register performs a register reset, which causes all registers to revert to their default values (except 74h, which forces the serial configuration).
Reading this register returns the ID code of the part and a code for the type of 3D Stereo Enhancement.
ID[9:0] Identify Capability. The ID decodes the capabilities of AD1981A based on the following:
SE[4:0] Stereo Enhancement: The AD1981A does not provide hardware 3D stereo enhancement (all bits are zeros).
Master Volume Register (Index 02h)For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
This register controls the line_out volume controls for both stereo channels and mute bit. Each volume subregister contains 5 bits,
generating 32 volume levels with 31 steps of 1.5 dB each.
Because AC ‘97 defines 6-bit volume registers, to maintain compatibility whenever the D5 or D13 bits are set to “1,” their respective
lower five volume bits are automatically set to “1” by the Codec logic. On readback, all lower 5 bits will read ones whenever these
bits are set to “1.”
AD1981A
Headphones Volume Register (Index 04h)1NOTES
1This register controls the headphone volume controls for both stereo channels and mute bit. Each volume subregister contains 5 bits, generating 32 volume levels
with 31 steps of 1.5 dB each. Because AC ‘97 defines 6-bit volume registers, to maintain compatibility whenever the D5 or D13 Bits are set to “1,” their respective
lower five volume bits are automatically set to “1” by the CODEC logic. On readback, all lower 5 bits will read ones when ever these bits are set to “1.”
2For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
Mono Volume (Index 06h)*
*This register controls the headphone volume controls for both stereo channels and mute bit. Each volume subregister contains 5 bits, generating 32 volume levelswith 31 steps of 1.5 dB each. Because AC ‘97 defines 6-bit volume registers, to maintain compatibility whenever the D5 or D13 Bits are set to “1,” their respective
lower five volume bits are automatically set to “1” by the CODEC logic. On readback, all lower 5 bits will read ones when ever these bits are set to “1.”
Phone Volume (Index 0Ch)
Mic Volume (Index 0Eh)
Line In Volume (Index 10h)*For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
CD Volume (Index 12h)*For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
AD1981A
AUX Volume (Index 16h)*For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
PCM Out Volume (Index 18h)*For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
Volume Table (Index 0Ch to 18h)
Record Select Control Register (Index 1Ah)NOTES
Used to select the record source independently for right and left. See table for legend.
The default value is 0000h, which corresponds to MIC in.
