AD1886AJST Fast Delivery |IC PHOENIX CO.,LIMITED

AD1886AJST ,AC?7 SoundMAX CodecFEATURESAC’97 2.2 Compliant20-Bit SPDIF Output w/32 kHz, 44.1 kHz, and 48 kHzGreater than 90 dB Dyn ..
AD1886AJST-REEL ,AC’97 SoundMAX® CodecFEATURESAC’97 2.2 Compliant20-Bit SPDIF Output w/32 kHz, 44.1 kHz, and 48 kHzGreater than 90 dB Dyn ..
AD1887JST ,AC?7 SoundMAX CodecSPECIFICATIONSSTANDARD TEST CONDITIONS UNLESS OTHERWISE NOTEDTemperature 25°C DAC Test ConditionsDi ..
AD1888JCP ,Low Cost 6 Channel AC' 97 Audio CodecSPECIFICATIONSSTANDARD TEST CONDITIONS, UNLESS OTHERWISE DAC Test ConditionsNOTED CalibratedTempera ..
AD1888JCP-REEL ,AC 97 SoundMAX CodecFEATURES Selectable Front and Rear MIC Inputs6 DAC Channels for 5.1 Surround with Preamp90 dB Dynam ..
AD1888JST ,AC 97 SoundMAX CodecSPECIFICATIONSSTANDARD TEST CONDITIONS, UNLESS OTHERWISE DAC Test ConditionsNOTED CalibratedTempera ..
AD834AR ,500 MHz Four-Quadrant Multiplier
AD834JR-REEL ,500 MHz Four-Quadrant Multiplier
AD835 ,250 MHz, Voltage Output 4-Quadrant MultiplierSpecifications subject to change without notice.–2– REV. AAD8351PIN CONNECTIONSABSOLUTE MAXIMUM RAT ..
AD8350AR15 ,Low Distortion 1.0 GHz Differential AmplifierCHARACTERISTICSDifferential Offset Voltage (RTI) V – V –1mVOUT+ OUT–Differential Offset Drift T to ..
AD8350AR15 ,Low Distortion 1.0 GHz Differential AmplifierSPECIFICATIONS to differential inputs and differential outputs unless noted.)Parameter Conditions M ..
AD8350AR15-REEL7 ,Low Distortion 1.0 GHz Differential AmplifierSPECIFICATIONS unless noted.)Parameter Conditions Min Typ Max UnitsDYNAMIC PERFORMANCE–3 dB Bandwid ..

AD1886AJST
AC?7 SoundMAX Codec
REV.0
AC’97 SoundMAX Codec
FUNCTIONAL BLOCK DIAGRAM
SYNC
BIT_CLK
MIC1
MIC2
AUX
VIDEO
LINE_OUT_L
MONO_OUT
LINE
PHONE_IN
LINE_OUT_R
XTAL_OUTXTAL_IN
RESET
SDATA_IN
SDATA_OUT
SPDIF
HP_OUT_R
HP_OUT_L
ID1ID0
VREFOUT
PC_BEEP
AC’97 2.1 FEATURES
Variable Sample Rate Audio
Multiple Codec Configuration Options
External Audio Power-Down Control
AC’97 FEATURES
AC’97 2.2 Compliant
Greater than 90dB Dynamic Range
Stereo Headphone Amplifier
Multibit �-� Converter Architecture for Improved S/N
Ratio Greater than 90dB
16-Bit Stereo Full-Duplex Codec
Four Analog Line-Level Stereo Inputs for:
LINE-IN, CD, VIDEO, and AUX
Two Analog Line-Level Mono Inputs for Speakerphone
and PC BEEP
Mono MIC Input w/Built-In 20dB Preamp, Switchable
from Two External Sources
High-Quality CD Input with Ground Sense
Stereo Line Level Outputs
Mono Output for Speakerphone or Internal Speaker
Power Management Support
48-Terminal LQFP Package
ENHANCED FEATURES
20-Bit SPDIF Output w/32kHz, 44.1kHz, and 48kHz
Symbol Rates
Full Duplex Variable Sample Rates from 7040 Hz tokHz with 1 Hz Resolution
Jack Sense Pins Provide Automatic Output Switching
Software-Enabled VREFOUT Output for Microphones and
External Power Amp
Split Power Supplies (3.3 V Digital/5 V Analog)
Mobile Low-Power Mixer Mode
Extended 6-Bit Master Volume Control
Extended 6-Bit Headphone Volume Control
Digital Audio Mixer Mode
Phat™ Stereo 3D Stereo Enhancement
SoundMAX is a registered trademark and Phat is a trademark of Analog Devices, Inc.
AD1886A–SPECIFICATIONS
ANALOG INPUT
MASTER VOLUME
PROGRAMMABLE GAIN AMPLIFIER—ADC
ANALOG MIXER—INPUT GAIN / AMPLIFIERS / ATTENUATORS
STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED
AD1886A
DIGITAL DECIMATION AND INTERPOLATION FILTERS*
ANALOG-TO-DIGITAL CONVERTERS
DIGITAL-TO-ANALOG CONVERTERS
ANALOG OUTPUT
*Guaranteed but not tested.
AD1886A–SPECIFICATIONS
STATIC DIGITAL SPECIFICATIONS
Low-Level Input Voltage (VIL)
High-Level Output Voltage (VOH), IOH = 2 mA
Low-Level Output Voltage (VOL), IOL = 2 mA
Input Leakage Current
POWER SUPPLY
Power Supply Range—Digital (DVDD)
Digital Supply Current—3.3 V (DVDD)20
CLOCK SPECIFICATIONS*
POWER-DOWN STATES
ADC
DAC
ADC + DAC
ADC + DAC + Mixer (Analog CD On)
Mixer
ADC + Mixer
DAC + Mixer
ADC + DAC + Mixer
Analog CD Only (AC-Link On)
Analog CD Only (AC-Link Off)
Standby
*Guaranteed but not tested.
Specifications subject to change without notice.
TIMING PARAMETERS (GUARANTEED OVER OPERATING TEMPERATURE RANGE)
RESET Inactive to BIT_CLK Startup Delay
SYNC Active High Pulsewidth
SYNC Low Pulsewidth
SYNC Inactive to BIT_CLK Startup Delay
BIT_CLK Frequency
BIT_CLK Period
BIT_CLK Output Jitter*
BIT_CLK High Pulsewidth
BIT_CLK Low Pulsewidth
SYNC Frequency
SYNC Period
Setup to Falling Edge of BIT_CLK
Hold from Falling Edge of BIT_CLK
BIT_CLK Rise Time
BIT_CLK Fall Time
SYNC Rise Time
SYNC Fall Time
SDATA_IN Rise Time
SDATA_IN Fall Time
SDATA_OUT Rise Time
SDATA_OUT Fall Time
End of Slot 2 to BIT_CLK, SDATA_IN Low
Setup to Trailing Edge of RESET (Applies to SYNC, SDATA_OUT)
Rising Edge of RESET to HI-Z Delay
Propagation Delay
RESET Rise Time
*Guaranteed but not tested.
Specifications subject to change without notice.
AD1886A
Figure 1.Cold Reset
Figure 2.Warm Reset
Figure 3.Clock Timing
Figure 4.Data Setup and Hold
Figure 5.Signal Rise and Fall Time
Figure 6.AC Link Low Power Mode Timing
Figure 7.ATE Test Mode
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD1886A features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS*
Ambient Temperature (Operating)
*Stresses greater than those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
*ST = Thin Quad Flatpack.
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating
TAMB = TCASE – (PD × θCA)
TCASE = Case Temperature in °C
PD = Power Dissipation in W
θCA = Thermal Resistance (Case-to-Ambient)
θJA = Thermal Resistance (Junction-to-Ambient)
θJC = Thermal Resistance (Junction-to-Case)
AD1886A
PIN CONFIGURATION
LINE_OUT_R
LINE_OUT_L
CX3D
RX3D
FILT_L
FILT_R
AFILT2
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET
AFILT1
VREFOUT
VREF
AVSS1
PC_BEEPAVDD1
SPDIFJSID1ID0AV
SS3
DD3HP_OUT_RAV
SS2
HP_OUT_LAV
DD2
PHONE_IN
VIDEO_LVIDEO_R
CD_L
CD_GND_REF
CD_R
MIC1MIC2
LINE_IN_L
LINE_IN_R
MONO_OUT
NC = NO CONNECT
PIN FUNCTION DESCRIPTIONS
Digital I/O
CHIP SELECTS
JACK SENSE/GENERAL-PURPOSE DIGITAL OUTPUT
The JS pin can be used to sense the presence of an audio plug in the output jacks and automatically mute the MONO and/or
LINE_OUT audio outputs. Alternatively, the JS can be programmed as a general-purpose digital output pin.
Analog I/O
These signals connect the AD1886A component to analog sources and sinks, including microphones and speakers.
Filter/Reference
These signals are connected to resistors, capacitors, or specific voltages.
Power and Ground Signals
No Connects
AD1886A
Figure 8.Block Diagram Register Map
Indexed Control Registers
NOTES
All registers not shown and bits containing an X are assumed to be reserved.
Odd register addresses are aliased to the next lower even address.
Reserved registers should not be written.
Zeros should be written to reserved bits.
*Indicates Aliased register for AD1819, AD1819A backward compatibility
AD1886A
Reset (Index 00h)
Note: Writing any value to this register performs a register reset, which causes all registers to revert to their default values (except 74h,
which forces the serial configuration). Reading this register returns the ID code of the part and a code for the type of 3D Stereo
Enhancement.
ID[9:0]Identify Capability. The ID decodes the capabilities of AD1886A based on the following:
*The AD1886A contains none of the optional features identified by these bits.
SE[4:0]Stereo Enhancement. The 3D stereo enhancement identifies the Analog Devices 3D stereo enhancement.
Master Volume Registers (Index 02h)
RMV[5:0]Right Master Volume Control. The least significant bit represents 1.5dB. This register controls the output fromdB to a maximum attenuation of –94.5dB.
LMV[5:0]Left Master Volume Control. The least significant bit represents 1.5dB. This register controls the output fromdB to a maximum attenuation of –94.5dB.Master Volume Mute. When this bit is set to “1,” the channel is muted.
Headphones Volume Registers (Index 04h)
RHV[5:0]Right Headphone Volume Control. The least significant bit represents 1.5dB. This register controls the output
from +6dB to a maximum attenuation of –88.5dB.
LHV[5:0]Left Headphone Volume Control. The least significant bit represents 1.5dB. This register controls the output
from +6dB to a maximum attenuation of –88.5dB.
HPMHeadphones Volume Mute. When this bit is set to “1,” the channel is muted.
Master Volume Mono (Index 06h)
MMV[5:0]Mono Master Volume Control. The least significant bit represents 1.5dB. This register controls the output fromdB to a maximum attenuation of –94.5dB.
MMMMono Master Volume Mute. When this bit is set to “1,” the channel is muted.
PC Beep Register (Index 0Ah)
PCV[3:0]PC Beep Volume Control. The least significant bit represents 3dB attenuation. This register controls the output
from 0dB to a maximum attenuation of –45dB. The PC Beep is routed to Left and Right Line outputs even when
AD1886A is in a RESET State. This is so Power-On Self-Test (POST) codes can be heard by the user in case of a
hardware problem with the PC.
PCMPC Beep Mute. When this bit is set to “1,” the channel is muted.
AD1886A
Phone Volume (Index 0Ch)
PHV[4:0]Phone Volume. Allows setting the Phone Volume Attenuator in 32 steps. The LSB represents 1.5dB, and the
range is +12dB to –34.5dB. The default value is 0dB, mute enabled.
PHMPhone Mute. When this bit is set to “1,” the channel is muted.
Mic Volume (Index 0Eh)
MCV[4:0]Mic Volume Gain. Allows setting the Mic Volume attenuator in 32 steps. The LSB represents 1.5dB, and the
range is +12dB to –34.5dB. The default value is 0dB, mute enabled.
M20Microphone 20dB Gain Block
0 = Disabled; Gain = 0dB
1 = Enabled; Gain = 20dB
MCMMic Mute. When this bit is set to “1,” the channel is muted.
Line In Volume (Index 10h)
RLV[4:0]Right Line In Volume. Allows setting the Line In right channel attenuator in 32 steps. The LSB represents 1.5dB,
and the range is +12dB to –34.5dB. The default value is 0dB, mute enabled.
LLV[4:0]Left Line In Volume. Allows setting the Line In left channel attenuator in 32 steps. The LSB represents 1.5dB,
and the range is +12dB to –34.5dB. The default value is 0dB, mute enabled.Line In Mute. When this bit is set to “1,” the channel is muted.
CD Volume (Index 12h)
RCV[4:0]Right CD Volume. Allows setting the CD right channel attenuator in 32 steps. The LSB represents 1.5dB, and
the range is +12dB to –34.5dB. The default value is 0dB, mute enabled.
LCV[4:0]Left CD Volume. Allows setting the CD left channel attenuator in 32 steps. The LSB represents 1.5dB, and the
range is +12dB to –34.5dB. The default value is 0dB, mute enabled.
CVMCD Volume Mute. When this bit is set to “1,” the channel is muted.

Partno	Mfg	Dc	Qty	Available	Descript
AD1886AJST	AD	N/a	1416	avai	AC?7 SoundMAX Codec