AD1885JST Fast Delivery |IC PHOENIX CO.,LIMITED

AD1885JST ,AC?7 SoundMAX CodecFEATURESVariable Sample Rate AudioFull Duplex Variable Sample Rates from 7040 Hz toMultiple Codec C ..
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AD1886A ,AD1886A AC?7 SoundMAX?CodecFEATURESAC’97 2.2 Compliant20-Bit SPDIF Output w/32 kHz, 44.1 kHz, and 48 kHzGreater than 90 dB Dyn ..
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AD1886AJST-REEL ,AC’97 SoundMAX® CodecFEATURESAC’97 2.2 Compliant20-Bit SPDIF Output w/32 kHz, 44.1 kHz, and 48 kHzGreater than 90 dB Dyn ..
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AD834AR ,500 MHz Four-Quadrant Multiplier
AD834JR-REEL ,500 MHz Four-Quadrant Multiplier

AD1885JST
AC?7 SoundMAX Codec
REV.0
AC’97 SoundMAX® Codec
FUNCTIONAL BLOCK DIAGRAM
AC’97 2.1 FEATURES
Variable Sample Rate Audio
Multiple Codec Configuration Options
External Audio Power-Down Control
AC’97 FEATURES
AC’97 2.1-Compliant
Greater than 90 dB Dynamic Range
Stereo Headphone Amplifier
Multibit �� Converter Architecture for Improved S/N
Ratio Greater than 90 dB
16-Bit Stereo Full-Duplex Codec
Four Analog Line-Level Stereo Inputs for:
LINE-IN, CD, VIDEO, and AUX
Two Analog Line-Level Mono Inputs for Speakerphone
and PC BEEP
Mono MIC Input w/Built-In 20 dB Preamp, Switchable
from Two External Sources
High Quality CD Input with Ground Sense
Stereo Line-Level Outputs
Mono Output for Speakerphone or Internal Speaker
Power Management Support
48-Terminal LQFP Package
ENHANCED FEATURES
Full Duplex Variable Sample Rates from 7040 Hz tokHz with 1 Hz Resolution
Jack Sense Pins Provide Automatic Output Switching
Software-Enabled VREFOUT Output for Microphones and
External Power Amp
Split Power Supplies (3.3 V Digital/5 V Analog)
Mobile Low-Power Mixer Mode
Extended 6-Bit Master Volume Control
Extended 6-Bit Headphone Volume Control
Digital Audio Mixer Mode
PHAT™ Stereo 3D Stereo Enhancement
SoundPort is a registered trademark and PHAT is a trademark of Analog Devices, Inc.
SYNC
BIT_CLK
XTL_OUTXTL_IN
SDATA_IN
SDATA_OUT
JS0/EAPDJS1
VREFOUT
MIC1
MIC2
AUX
VIDEO
LINE_OUT_L
MONO_OUT
LINE
PHONE_IN
LINE_OUT_R
PC_BEEP
HP_OUT_R
HP_OUT_L
ID0ID1
RESET
AD1885–SPECIFICATIONS
ANALOG INPUT
MIC with 20 dB Gain (M20 = 1)
MIC with 0 dB Gain (M20 = 0)
Input Impedance*
MASTER VOLUME
PROGRAMMABLE GAIN AMPLIFIER—ADC
ANALOG MIXER—INPUT GAIN/AMPLIFIERS/ATTENUATORS
Step Size (+12 dB to –34.5 dB): (All Steps Tested)
Input Gain/Attenuation Range: MIC, LINE, AUX, CD, VIDEO, PHONE_IN, DAC
Step Size (0 dB to –45 dB): (All Steps Tested) PC_BEEP
* Guaranteed, not tested.
STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED
Temperature25°C
Digital Supply (DVDD)3.3V
Analog Supply (AVDD)5.0V
Sample Rate (FS)48kHz
Input Signal1008Hz
Analog Output Passband20 Hz to 20 kHz
DAC Test Conditions
Calibrated
–3 dB Attenuation Relative to Full Scale
Input 0 dB
10 kΩ Output Load (LINE_OUT)Ω Output Load (HP_OUT)
ADC Test Conditions
Calibrated
0 dB Gain
Input –3.0 dB Relative to Full Scale
AD1885
DIGITAL DECIMATION AND INTERPOLATION FILTERS*
Stopband Rejection
Group Delay
ANALOG-TO-DIGITAL CONVERTERS
ADC Crosstalk*
Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L)
LINE_IN to Other
Gain Error (Full-Scale Span Relative to Nominal Input Voltage)
Interchannel Gain Mismatch (Difference of Gain Errors)
DIGITAL-TO-ANALOG CONVERTERS
Gain Error (Full-Scale Span Relative to Nominal Input Voltage)
ANALOG OUTPUT
External Load Impedance*
Output Capacitance*
External Load Capacitance
Full-Scale Output Voltage; HP_OUT (0
Output Capacitance*
External Load Capacitance
VREF
VREFOUT Current Drive
*Guaranteed, not tested.
AD1885–SPECIFICATIONS
STATIC DIGITAL SPECIFICATIONS*
POWER SUPPLY
Power Supply Range—Digital (DVDD)
Digital Supply Current—3.3 V (DVDD)21
CLOCK SPECIFICATIONS
POWER-DOWN MODE*
NOTES
*Guaranteed, not tested.
Output jitter is directly dependent on crystal input jitter.
Specifications subject to change without notice.
AD1885
TIMING PARAMETERS (GUARANTEED OVER OPERATING TEMPERATURE RANGE)
NOTES
*Output jitter is directly dependent on crystal input jitter.
Specifications subject to change without notice.
AD1885
Figure 1.Cold Reset
Figure 2.Warm Reset
Figure 3.Clock Timing
Figure 4.Data Setup and Hold
Figure 5.Signal Rise and Fall Time
Figure 6.AC-Link Low Power Mode Timing
Figure 7.ATE Test Mode
ORDERING GUIDE
*ST = Thin Quad Flatpack.
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating
TAMB = TCASE – (PD × θCA)
TCASE = Case Temperature in °C
PD = Power Dissipation in W
θCA = Thermal Resistance (Case-to-Ambient)
θJA = Thermal Resistance (Junction-to-Ambient)
θJC = Thermal Resistance (Junction-to-Case)
ABSOLUTE MAXIMUM RATINGS*
Ambient Temperature (Operating)
*Stresses greater than those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD1885 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
LINE_OUT_R
LINE_OUT_L
CX3D
RX3D
FILT_L
FILT_R
AFILT2
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
AFILT1
VREFOUT
VREF
AVSS1
PC_BEEPAVDD1
PHONE_IN
AUX_L
AUX_R
VIDEO_LVIDEO_R
CD_L
CD_GND_REF
CD_R
MIC1MIC2
LINE_IN_L
LINE_IN_R
MONO_OUTAV
DD2
HP_OUT_LAV
SS2
HP_OUT_RNCAV
DD3
SS3
JS0 (EAPD)JS1
NC = NO CONNECT
ID1ID0
RESET
AD1885–SPECIFICATIONS
PIN FUNCTION DESCRIPTIONS
Digital I/O
CHIP SELECTS
JACK SENSES/EAPD/GENERAL-PURPOSE DIGITAL OUTPUTS
These signals can sense the presence of audio jacks in the line-out or headphones outputs, and automatically mute the other audio
outputs. JS0 can also be programmed for EAPD control. Alternatively, both pins can be programmed as general-purpose digital outputs.
Analog I/O
These signals connect the AD1885 component to analog sources and sinks, including microphones and speakers.
Filter/Reference
These signals are connected to resistors, capacitors, or specific voltages.
Power and Ground Signals
No Connects
JS0/EAPDJS1
VREFOUT
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
HP_OUT_L
MONO_OUT
PHONE_IN
VIDEO
AUX
LINE
MIC2
MIC1
LINE_OUT_L
LINE_OUT_R
HP_OUT_R
ID1ID0
RESET
AD1885
PRODUCT OVERVIEW
The AD1885 Codec meets the Audio Codec ’97 2.1 Extensions,
adding support for multiple Codecs and variable sample rates.
In addition, the AD1885 SoundPort Codec is designed to meet
all requirements of the Audio Codec ’97, Component Specification,
Revision 1.03, © 1996, Intel Corporation, found at www.Intel.com.
The AD1885 also includes other Codec enhanced features such
as communicating to three Codecs on the same link, integrated
headphone driver and built-in PHAT Stereo 3D enhancement.
The AD1885 is an analog front end for high-performance PC
audio, modem, or DSP applications. The AC’97 architecture
defines a 2-chip audio solution comprising a digital audio
controller, plus a high-quality analog component that includes
Digital-to-Analog Converters (DACs), Analog-to-Digital Con-
verters (ADCs), mixer, and I/O.
The main architectural features of the AD1885 are the high
quality analog mixer section, two channels of Σ∆ ADC conver-
sion, two channels of Σ∆ DAC conversion and Data Direct
Scrambling (D2S) rate generators.
FUNCTIONAL DESCRIPTION
This section overviews the functionality of the AD1885 and is
intended as a general introduction to the capabilities of the
device. Detailed reference information may be found in the
descriptions of the Indexed Control Registers.
Analog Inputs
The Codec contains a stereo pair of Σ∆ ADCs. Inputs to the
ADC may be selected from the following analog signals: tele-
phony (PHONE_IN), mono microphone (MIC1 or MIC2),
stereo line (LINE_IN), auxiliary line input (AUX), stereo CD
ROM (CD), stereo audio from a video source (VIDEO) and
post-mixed stereo or mono line output (LINE_OUT).
Analog Mixing
PHONE_IN, MIC1 or MIC2, LINE_IN, AUX, CD, and VIDEO
can be mixed in the analog domain with the stereo output from the
DACs. Each channel of the stereo analog inputs may be inde-
pendently gained or attenuated from +12 dB to –34.5dB in 1.5dB
steps. The summing path for the mono inputs (PHONE_IN, MIC1,
and MIC2 to LINE_OUT and HP_OUT) duplicates mono chan-
nel data on both the left and right LINE_OUT and HP_OUT.
Additionally, the PC attention signal (PC_BEEP) may be mixed
with the line output and headphone. A switch allows the output
of the DACs to bypass the PHAT Stereo 3D enhancement.
Digital Audio Mode
The AD1885 is designed with a Digital Audio Mode (DAM)
that allows mixing of all analog inputs, independent of the DAC
output signal path. Mixed analog input signals may be sent to
the ADCs for processing by the DC ’97 controller or the host,
and may be used during simultaneous capture and playback at
different sample rates.
Analog-to-Digital Signal Path
The selector sends left and right channel information to the
programmable gain amplifier (PGA). The PGA following the
selector allows independent gain control for each channel enter-
ing the ADC from 0dB to +22.5 dB in 1.5 dB steps. Each
channel of the ADC is independent, and can process left and
Sample Rates and D2S
The AD1885 default mode sets the Codec to operate at 48 kHz
sample rates. The converter pairs may process left and right
channel data at different sample rates. The AD1885 sample rate
generator allows the Codec to instantaneously change and process
sample rates from 7040 Hz to 48 kHz with a resolution of 1 Hz.
The in-band integrated noise and distortion artifacts introduced
by rate conversions are below –90 dB. The AD1885 uses a 4-bit
Σ∆ structure and D2S to enhance noise immunity on mother-
boards and in PC enclosures, and to suppress idle tones below
the device’s quantization noise floor. The D2S process pushes
noise and distortion artifacts caused by errors in the multibit
DAC to frequencies beyond the auditory response of the human
ear and then filters them.
Digital-to-Analog Signal Path
The analog output of the DAC may be gained or attenuated
from +12 dB to –34.5 dB in 1.5 dB steps, and summed with any
of the analog input signals. The summed analog signal enters
the Master Volume stage where each channel of the mixer out-
put may be attenuated from 0 dB to –94.5 dB in 1.5 dB steps
or muted.
Analog Outputs
The AD1885 offers a line output controlled by the Master Volume
control and an integrated headphone driver with independent
control.
Host-Based Echo Cancellation Support
The AD1885 supports time correlated I/O data format by pre-
senting mic data on the left channel of the ADC and the mono
summation of left and right output on the right channel. The
ADC is splittable; left and right ADC data can be sampled at
different rates.
Telephony Modem Support
The AD1885 contains a V.34-capable analog front end for sup-
porting host-based and data pump modems. The modem DAC
typical dynamic range is 90 dB over a 4.2 kHz analog output
passband where FS = 12.8 kHz. The left channel of the ADC
and DAC may be used to convert modem data at the same
sample rate in the range between 7040 Hz and 48 kHz. All pro-
grammed sample rates have a resolution of 1 Hz. The AD1885
supports irrational V.34 sample rates with 8/7 and 10/7 select-
able multiplier coefficients.
Power Management Modes
The AD1885 is designed to meet notebook and ACPI power
consumption requirements through flexible power management
control of all internal resources. The following subsections may
be independently controlled:
ADCs and Input Mux Power-Down
DACs Power-Down
Analog Mixer Power-Down
Digital Interface Power-Down
Internal Clocks Disabled
ADC and DAC Power-Down
VREF Standby Mode
Low-Power Mixer Mode—CD Mixer Alive Only Mode
Mixer Bypass Mode (Digital Audio)
Headphone
Indexed Control Registers
NOTES
All registers not shown and bits containing an X are assumed to be reserved.
Odd register addresses are aliased to the next lower even address.
Reserved registers should not be written.
AD1885
Reset (Index 00h)
Note: Writing any value to this register performs a register reset, which causes all registers to revert to their default values (except
74h, which forces the serial configuration). Reading this register returns the ID code of the part and a code for the type of 3D Stereo
Enhancement.
ID[9:0] Identify Capability. The ID decodes the capabilities of AD1885 based on the following:
SE[4:0]Stereo Enhancement. The 3D stereo enhancement identifies the Analog Devices 3D stereo enhancement.
Master Volume Registers (Index 02h)
RMV[5:0]Right Master Volume Control. The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of –94.5 dB.
LMV[5:0]Left Master Volume Control. The least significant bit represents 1.5 dB. This register controls the output from 0dB to
a maximum attenuation of –94.5 dB.Master Volume Mute. When this bit is set to “1,” the channel is muted.
Headphones Volume Registers (Index 04h)
RHV[5:0]Right Headphone Volume Control. The least significant bit represents 1.5 dB. This register controls the out-
put from +6 dB to a maximum attenuation of –88.5 dB.
LHV[5:0]Left Headphone Volume Control. The least significant bit represents 1.5 dB. This register controls the output
from +6 dB to a maximum attenuation of –88.5 dB.
HPMHeadphone Volume Mute. When this bit is set to “1,” the channel is muted.
Master Volume Mono (Index 06h)
MMV[4:0]Mono Master Volume Control. The least significant bit represents 1.5 dB. This register controls the output fromdB to a maximum attenuation of 46.5 dB.
MMMMono Master Volume Mute. When this bit is set to “1,” the channel is muted.
PC Beep Register (Index 0Ah)
PCV[3:0]PC Beep Volume Control. The least significant bit represents 3 dB attenuation. This register controls the output
from 0 dB to a maximum attenuation of –45 dB. The PC Beep is routed to Left and Right Line outputs even when
AD1885 is in a RESET state. This is so that Power-On Self-Test (POST) codes can be heard by the user in case
of a hardware problem with the PC.
PCMPC Beep Mute. When this bit is set to “1,” the channel is muted.
AD1885
Phone Volume (Index 0Ch)
PHV[4:0]Phone Volume. Allows setting the Phone Volume Attenuator in 32 steps. The LSB represents 1.5 dB, and the
range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
PHMPhone Mute. When this bit is set to “1,” the channel is muted.
MIC Volume (Index 0Eh)
MCV[4:0]MIC Volume Gain. Allows setting the MIC Volume attenuator in 32 steps. The LSB represents 1.5 dB, and the
range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
M20Microphone 20 dB Gain Block
0 = Disabled; Gain = 0 dB
1 = Enabled; Gain = 20 dB.
MCMMIC Mute. When this bit is set to “1,” the channel is muted.
Line In Volume (Index 10h)
RLV[4:0]Right Line In Volume. Allows setting the Line In right channel attenuator in 32 steps. The LSB represents 1.5dB,
and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
LLV[4:0]Line In Volume Left. Allows setting the Line In left channel attenuator in 32 steps. The LSB represents 1.5 dB, and
the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.Line In Mute. When this bit is set to “1,” the channel is muted.
CD Volume (Index 12h)
RCV[4:0]Right CD Volume. Allows setting the CD right channel attenuator in 32 steps. The LSB represents 1.5 dB, and
the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
LCV[4:0]Left CD Volume. Allows setting the CD left channel attenuator in 32 steps. The LSB represents 1.5 dB, and the
range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
CVMCD Volume Mute. When this bit is set to “1,” the channel is muted.

Partno	Mfg	Dc	Qty	Available	Descript
AD1885JST	ANALOG	N/a	360	avai	AC?7 SoundMAX Codec