AD1866N-AD1866R Fast Delivery |IC PHOENIX CO.,LIMITED

AD1866N ,Single Supply Dual 16-Bit Audio DACFEATURESDual Serial Input, Voltage Output DACsSingle +5 Volt SupplyAD186616-BIT0.005% THD+NDACV 1 1 ..
AD1866R ,Single Supply Dual 16-Bit Audio DACSpecifications subject to change without notice.
AD1866RZ , Single Supply Dual 16-Bit Audio DAC
AD1868N ,Single Supply Dual 18-Bit Audio DACSpecifications subject to change without notice.*Stresses greater than those listed under “Absolute ..
AD1868N-J ,Single Supply Dual 18-Bit Audio DACAPPLICATIONS REFCK NRLPortable Compact Disc Players 4 13Portable DAT Players and RecordersDR 5 12 A ..
AD1868R ,Single Supply Dual 18-Bit Audio DACSPECIFICATIONS AMin Typ Max UnitsRESOLUTION 18 BitDIGITAL INPUTS V 2.4 VIHV 0.8 VILI , V = V 1.0 μA ..
AD8322ARU ,5 V CATV Line Driver Coarse Step Output Power ControlFEATURES FUNCTIONAL BLOCK DIAGRAMSupports DOCSIS Standard for Reverse PathV (7 PINS)CCTransmissionG ..
AD8322ARU-REEL ,5 V CATV Line Driver Coarse Step Output Power Controlapplications such as cable@ MAX GAINmodems that are designed to the MCNS-DOCSIS upstream –60standar ..
AD8323 ,5 V CATV Line Driver Fine Stepapplications such as cableP = 60dBmV @ MAX GAINOmodems that are designed to the MCNS-DOCSIS upstrea ..
AD8323ARU ,5 V CATV Line Driver Fine Step Output Power ControlCHARACTERISTICSSpecified AC Voltage Output = 60 dBmV, Max Gain 116 mV p-pNoise Figure Max Gain, f = ..
AD8323ARU ,5 V CATV Line Driver Fine Step Output Power Controlapplications such as cableP = 60dBmV @ MAX GAINOmodems that are designed to the MCNS-DOCSIS upstrea ..
AD8323ARU-REEL ,5 V CATV Line Driver Fine Step Output Power ControlCHARACTERISTICSBandwidth (–3 dB) All Gain Codes 100 MHzBandwidth Roll-Off f = 65 MHz 1.3 dBBandwidt ..

AD1866N-AD1866R
Single Supply Dual 16-Bit Audio DAC
FUNCTIONAL BLOCK DIAGRAM
CLK
DGNDL
NRL
AGND
NRR
VBL
VORVBR
VOL
REV.0Single Supply
Dual 16-Bit Audio DAC
FEATURES
Dual Serial Input, Voltage Output DACs
Single +5 Volt Supply
0.005% THD+N
Low Power –50 mW
115 dB Channel Separation
Operates at 83 Oversampling
16-Pin Plastic DIP or SOIC Package
APPLICATIONS
Multimedia Workstations
PC Audio Add-In Boards
Portable CD and DAT Players
Automotive CD and DAT Players
Noise Cancellation
PRODUCT DESCRIPTION
The AD1866 is a complete dual 16-bit DAC offering excellent
performance while requiring a single +5 V power supply. It is
fabricated on Analog Devices’ ABCMOS wafer fabrication
process. The monolithic chip includes CMOS logic elements,
bipolar and MOS linear elements and laser trimmed, thin-
film resistor elements. Careful design and layout techniques
have resulted in low distortion, low noise, high channel separa-
tion and low power dissipation.
The DACs on the AD1866 chip employ a partially segmented
architecture. The first three MSBs of each DAC are segmented
into 7 elements. The 13 LSBs are produced using standard
R-2R techniques. The segments and R-2R resistors are laser
trimmed to provide extremely low total harmonic distortion.
The AD1866 requires no deglitcher or trimming circuitry.
Each DAC is equipped with a high performance output ampli-
fier. These amplifiers achieve fast settling and high slew rate,
producing ±1 V signals at load currents up to ±1 mA. The buff-
ered output signal range is 1.5 V to 3.5 V. The 2.5 V reference
voltages eliminate the need for “false ground” networks.
A versatile digital interface allows the AD1866 to be directly
connected to all digital filter chips. Fast CMOS logic elements
allow for an input clock rate of up to 16 MHz. This allows for
operation at 2×, 4×, 8×, or 16× the sampling frequency (where
FS = 44.1 kHz) for each channel. The digital input pins of the
AD1866 are TTL and +5 V CMOS compatible.
*. Patent Nos: 3,961,326; 4,141,004; 4,349,811; 4,857,862;
and patents pending.
The AD1866 operates on +5 V power supplies. The digital
supply, VL, can be separated from the analog supply, VS, for re-
duced digital feedthrough. Separate analog and digital ground
pins are also provided. In systems employing a single +5 volt
power supply, VL and VS should be connected together. In bat-
tery operated systems, operation will continue even with re-
duced supply voltage. Typically, the AD1866 dissipates 50 mW.
The AD1866 is packaged in either a 16-pin plastic DIP or a
16-pin plastic SOIC package. Operation is guaranteed over the
temperature range of –35°C to +85°C and over the voltage
supply range of 4.75 V to 5.25 V.
PRODUCT HIGHLIGHTSSingle supply operation @ +5 V.50 mW power dissipation.THD+N is 0.005% (typical).Signal-to-Noise Ratio is 95 dB (typical).115 dB channel separation (typical).Compatible with all digital filter chips.16-pin DIP and 16-pin SOIC packages.No deglitcher required.No external adjustments required.
AD1866–SPECIFICATIONS(TA = +258C and +5 V supplies unless otherwise noted)
DRIFT (0°C to +70°C)
TOTAL HARMONIC DISTORTION + NOISE
POWER SUPPLY
Specifications subject to change without notice.
Specifications in boldface are tested on all production units at final electrical
FREQUENCY – Hz
Figure 1.THD+N vs. Frequency
FREQUENCY – Hz
CHANNEL SEPARATION – dB
105
Figure 2.Channel Separation vs. Frequency
SUPPLY VOLTAGE
THD+N – dB
5.45.25.04.8
Figure 3.THD+N vs. Supply Voltage
INPUT AMPLITUDE – dB
GAIN LINEARITY ERROR – dB
–100–20–40–60
Figure 4.Gain Linearity Error vs. Input Amplitude
TEMPERATURE – °C
THD+N – dB
1007550250–25
Figure 5.THD+N vs. Temperature
FREQUENCY – Hz
PSRR – dB
104
Figure 6.Power Supply Rejection Ratio vs. Frequency
(Supply Modulation Amplitude at 500 mV p-p)
AD1866
ABSOLUTE MAXIMUM RATINGS*
VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 V to 6 V
VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 V to 6 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . .±0.3 V
Digital Inputs to DGND . . . . . . . . . . . . . . . . . . .–0.3 V to VL
Soldering (10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . .+300°C
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD1866 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
CLK
DGNDL
NRL
AGND
NRR9
VBL
VORVBR
VOL
PIN DESIGNATIONS
ORDERING GUIDE
TOTAL HARMONIC DISTORTION + NOISE
Total harmonic distortion plus noise (THD+N) is defined as
the ratio of the square root of the sum of the squares of the am-
plitudes of the harmonics and noise to the amplitude of the fun-
damental input frequency. It is usually expressed in percent (%)
or decibels (dB).
D-RANGE DISTORTION (EIAJ SPECIFICATION)
D-Range distortion is the ratio of the amplitude of the signal at
an amplitude of –60 dB to the amplitude of the distortion plus
noise. In this case, an A-weight filter is used. The value speci-
fied for D-range performance is the ratio measured plus 60 dB.
SIGNAL-TO-NOISE RATIO
The signal-to-noise ratio is defined as the ratio of the amplitude
of the output when a full-scale output is present to the ampli-
tude of the output with no signal present. It is expressed in
decibels (dB) and measured using an A-weight filter.
GAIN LINEARITY
Gain linearity is a measure of the deviation of the actual output
amplitude from the ideal output amplitude. It is determined by
measuring the amplitude of the output signal as the amplitude
of that output signal is digitally reduced to a lower level. A per-
fect D/A converter exhibits no difference between the ideal and
actual amplitudes. Gain linearity is expressed in decibels (dB).
MIDSCALE ERROR
Midscale error, or bipolar zero error, is the deviation of the ac-
tual analog output from a voltage at the bias pin when the twos
complement input code representing midscale is loaded in the
DAC. Midscale error is expressed in mV.
FUNCTIONAL DESCRIPTION
The AD1866 is a complete, monolithic dual 16-bit digital audio
DAC which runs off a single +5 volt supply. As shown in the
block diagram, each channel contains a voltage reference, a
16-bit serial-to-parallel input register, a 16-bit input latch, a
16-bit DAC, and an output amplifier.
The voltage reference section provides a reference voltage and a
false ground voltage for each channel. The low noise bandgap
circuits produce reference voltages that are unaffected by
changes in temperature, time, and power supply.
The input registers are fabricated with CMOS logic gates.
These gates allow high switching speeds and low power con-
sumption, contributing to the fast digital timing, the low glitch
and low power dissipation of the AD1866.
CLK
DGND
NRL
AGND
NRR
VBL
VORVBR
VOL
AD1866 Functional Block Diagram
The 16-bit DAC uses a combination of segmentation and R-2R
architecture to achieve good integral and differential linearity.
The resistors which form the ladder structure are fabricated
with silicon-chromium thin film. Laser trimming of these resis-
tors further reduces linearity error, resulting in low output
distortion.
The output amplifier uses both MOS and bipolar devices and
incorporates an NPN class A output stage. It is designed to pro-
duce high slew rate, low noise, low distortion, and optimal fre-
quency response.
GROUNDING RECOMMENDATIONS
The AD1866 has two ground pins, designated as AGND (Pin
12) and DGND (Pin 7). The analog ground, AGND, serves as
the “high quality” reference ground for analog signals and as a
return path for the supply current from the analog portion of
the device. The system analog common should be located as
close as possible to Pin 12 to minimize any voltage drop which
may develop between these two points, although the internal
circuit is designed to minimize signal dependence of the analog
return current.
The digital ground, DGND, returns ground current from the
digital logic portion of the device. This pin should be connected
to the digital common node in the system. As shown in Figure
7, the analog and digital grounds should be joined at one point
in a system. When these two grounds are connected such as at
the power supply ground, care should be taken to minimize the
voltage difference between the DGND and AGND pins in or-
der to ensure the specified performance.
POWER SUPPLIES AND DECOUPLING
The AD1866 has three power supply input pins. VS (Pins 9 and
15) provide the supply voltages which operate the analog por-
tion of the device including the 16-bit DACs, the voltage refer-
ences, and the output amplifiers. The VS supplies are designed
to operate from a +5 V supply. These pins should be decoupled
to the analog ground using a 0.1 μF capacitor. Good engineer-
ing practice suggests that the bypass capacitor be placed as
close as possible to the package pins. This minimizes the inher-
ent inductive effects of printed circuit board traces.
VL (Pin 1) operates the digital portions of the chip including the
input shift registers and the input latching circuitry. VL is also
designed to operate from a +5 V supply. This pin should be by-
passed to digital common using a 0.1 μF capacitor, again placed
as close as possible to the package pins. Figure 7 illustrates the
correct connection of the digital and analog supply bypass
capacitors.
An important feature of the AD1866 audio DAC is its ability to
operate at diminished power supply voltages. This feature is
very important in portable battery operated systems. As the bat-
teries discharge, the supply voltage drops. Unlike any other au-
dio DAC, the AD1866 can continue to function at supply
voltages as low as 3.5 V. Because of its unique design, the
power requirements of the AD1866 diminish as the battery volt-
age drops, further extending the operating time of the system.
POWER
SUPPLY
(CAPACITOR VALUES ARE 0.1 µF UNLESS OTHERWISE
INDICATED)
NRL
AD1866
CLK
VBL
VOL
Figure 7.Recommended Circuit Schematic
NOISE REDUCTION CAPACITORS
The AD1866 has two noise reduction pins, designated as NRL
(Pin 13) and NRR (Pin 11). In order to meet specifications, it
is required that external noise reduction capacitors be con-
nected from these pins to AGND to reduce the output noise
contributed by the voltage reference circuitry. As shown in Fig-
ure 7, each of these pins should be bypassed to AGND with a
4.7 μF or larger capacitor. The connections between the ca-
pacitors, package pins and AGND should be as short as pos-
sible to achieve the lowest noise.
USING VBL AND VBR
The AD1866 has two bias voltage reference pins, designated as
VBR (Pin 8) and VBL (Pin 16). Each of these pins supplies a dc
reference voltage equal to the center of the output voltage swing.
These bias voltages replace “false ground” networks previously
required in single supply audio systems. At the same time, they
allow dc coupled systems, improving audio performance.
AD1866–Analog Circuit Considerations

Partno	Mfg	Dc	Qty	Available	Descript
AD1866N	AD	N/a	8	avai	Single Supply Dual 16-Bit Audio DAC
AD1866R	ADI	N/a	3	avai	Single Supply Dual 16-Bit Audio DAC