AD1862 Fast Delivery |IC PHOENIX CO.,LIMITED

AD1862 ,Ultralow Noise 20-Bit Audio DACAPPLICATIONS +V4 13 NRL1High Performance Compact Disc PlayersCLK 5 12 AGNDINPUTDigital Audio Amplif ..
AD1862N ,Ultralow Noise 20-Bit Audio DACAPPLICATIONS +V4 13 NRL1High Performance Compact Disc PlayersCLK 5 12 AGNDINPUTDigital Audio Amplif ..
AD1862N-J ,Ultralow Noise 20-Bit Audio DACSPECIFICATIONS AMin Typ Max UnitsRESOLUTION 20 BitsDIGITAL INPUTS V 2.0 4.0 VIHV 0.4 0.8 VILI @ V = ..
AD1864N ,Complete Dual 18-Bit Audio DACSPECIFICATIONS unless otherwise noted)Min Typ Max UnitsRESOLUTION 18 BitsDIGITAL INPUTSV 2.0 +V VIH ..
AD1864N-J ,Complete Dual 18-Bit Audio DACapplications.7. Both channels are 100% tested at 8 × F .S8. Low Power—only 225 mW typ, 265 mW max.9 ..
AD1864N-K ,Complete Dual 18-Bit Audio DACFEATURESDIP BLOCK DIAGRAMSDual Serial Input, Voltage Output DACsNo External Components Required1 24 ..
AD831APZ , Low Distortion Mixer
AD8320ARP ,Serial Digital Controlled Variable Gain Line DriverFEATURESFUNCTIONAL BLOCK DIAGRAM8-Bit Serial Gain ControlV/V/LSB Linear Gain ResponseVCC GND36 dB G ..
AD8321AR ,Gain Programmable CATV Line DriverSpecificationsREV. 0Information furnished by Analog Devices is believed to be accurate andreliable. ..
AD8321AR-REEL ,Gain Programmable CATV Line DriverFEATURES FUNCTIONAL BLOCK DIAGRAMLinear in dB Gain Response Over >53 dB RangeVCC GNDDrives Low Dist ..
AD8322ARU ,5 V CATV Line Driver Coarse Step Output Power ControlFEATURES FUNCTIONAL BLOCK DIAGRAMSupports DOCSIS Standard for Reverse PathV (7 PINS)CCTransmissionG ..
AD8322ARU-REEL ,5 V CATV Line Driver Coarse Step Output Power Controlapplications such as cable@ MAX GAINmodems that are designed to the MCNS-DOCSIS upstream –60standar ..

AD1862
Ultralow Noise 20-Bit Audio DAC
FUNCTIONAL BLOCK DIAGRAM
–VS
–VS
TRIM
+VL
CLK
DATA
–VL
+VS
NR2
ADJ
NR1
AGND
IOUT
DGND
REV.AUltralow Noise
20-Bit Audio DAC
FEATURES
120 dB Signal-to-Noise Ratio
102 dB D-Range Performance
61 dB Gain Linearity
61 mA Output Current
16-Pin DIP Package
0.0012% THD + N
APPLICATIONS
High Performance Compact Disc Players
Digital Audio Amplifiers
Synthesizer Keyboards
Digital Mixing Consoles
High Resolution Signal Processing
PRODUCT DESCRIPTION
The AD1862 is a monolithic 20-bit digital audio DAC. Each
device provides a 20-bit DAC, 20-bit serial-to-parallel input
register and voltage reference. The digital portion of the
AD1862 is fabricated with CMOS logic elements that are pro-
vided by Analog Devices’ BiMOS II process. The analog por-
tion of the AD1862 is fabricated with bipolar and MOS devices
as well as thin-film resistors.
New design, layout and packaging techniques all combine to
produce extremely high performance audio playback. The de-
sign of the AD1862 incorporates a digital offset circuit which
improves low-level distortion performance. Low stress packag-
ing techniques are used to minimize stress-induced parametric
shifts. Stress-sensitive circuit elements are located in die areas
which are least affected by packaging stress. Laser-trimming of
initial linearity error affords extremely low total harmonic
distortion. Output glitch is also small, contributing to the over-
all high level of performance.
The noise performance of the AD1862 is excellent. When used
with the recommended two external noise-reduction capacitors,
it achieves 120 dB signal-to-noise ratio.
The serial input port consists of the clock, data and latch enable
pins. A serial 20-bit, 2s complement data word is clocked into
the DAC, MSB first, by the external data clock. A latch-enable
signal transfers the input word from the internal serial input
register to the DAC input register. The data clock can function
at 17 MHz, allowing 16 × FS operation. The serial input port is
compatible with second-generation digital filter chips for con-
sumer audio products such as the NPC SM5813 and SM5818.
The AD1862 operates with ±5 V to ±12 V supplies for the dig-
ital power supplies and ±12 V supplies for the analog supplies.
The digital and analog supplies can be separated for reduced
digital crosstalk. Separate analog and digital common pins are
also provided. The AD1862 typically dissipates less than
300mW.
The AD1862 is packaged in a 16-pin plastic DIP. The operating
range is guaranteed to be –25°C to +70°C.
PRODUCT HIGHLIGHTS120 dB signal-to-noise ratio. (typical)102 dB D-Range performance. (minimum)±1 dB gain linearity @ –90 dB amplitude.20-bit resolution provides 120 dB of dynamic range.16 × FS operation.0.0016% THD+N @ 0 dB signal amplitude. (typical)Space saving 16-pin DIP package.±1 mA output current.
*. Patent Numbers: 4,349,811; 4,857,862; 4,855,618;
3,961,326; 4,141,004; 4,902,959.
AD1862–SPECIFICATIONS
ACCURACY
SIGNAL-TO-NOISE RATIO
FEEDBACK RESISTOR
TEMPERATURE RANGE
NOTESTest Method complies with EIAJ Standard CP-307.The signal-to-noise measurement includes noise contributed by the SE5534A op amp used in the test fixture but does not include the noise contributed by the low
pass filter used in the test fixture.
Specifications in boldface are tested on all production units at final electrical test.
Specifications subject to change without notice.
(TA at +258C and 612 V supplies, see Figure 10 for test circuit schematic)

AD1862
ABSOLUTE MAXIMUM RATINGS*
VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +13.2 V
–VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –VS to 0 V
VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +13.2 V
–VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –13.2 to 0 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +0.3 V
Digital Inputs to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 to VL
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C, 10 sec
Storage Temperature . . . . . . . . . . . . . . . . . . –60°C to +100°C
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD1862 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATIONPIN DESIGNATIONS
ORDERING GUIDE
*N = Plastic DIP.–VS
TRIML
CLK
DATA
NR2
ADJ
NR1
AGND
IOUTF
DGNDSLS
TOTAL HARMONIC DISTORTION + NOISE
Total Harmonic Distortion plus Noise (THD+N) is defined as
the ratio of the square root of the sum of the squares of the val-
ues of the harmonics and noise to the value of the fundamental
input frequency. It is usually expressed in percent (%) or deci-
bels (dB).
D-RANGE DISTORTION
D-Range Distortion is the ratio of the signal amplitude to the
distortion plus noise at –60 dB. In this case, an A-Weight filter
is used. The value specified for D-Range performance is the ra-
tio measured plus 60 dB.
SETTLING TIME
Settling Time is the time required for the output to reach and
remain within ±1/2 LSB about its final value, measured from
the digital input transition. It is a primary measure of dynamic
performance and is usually expressed in nanoseconds (ns).
SIGNAL-TO-NOISE RATIO
The Signal-to-Noise Ratio is defined as the ratio of the ampli-
tude of the output with full-scale present to the amplitude of the
output when no signal is present. It is expressed in decibels (dB)
and measured using an A-Weight filter.
GAIN LINEARITY
Gain Linearity is a measure of the deviation of the actual output
amplitude from the ideal output amplitude. It is determined by
measuring the amplitude of the output signal as the amplitude
of that output signal is digitally reduced to a low level. A perfect
D/A converter exhibits no difference between the ideal and ac-
tual amplitudes. Gain linearity is expressed in decibels (dB).
MIDSCALE ERROR
Midscale Error, or bipolar zero error, is the deviation of the ac-
tual analog output from the ideal output when the 2s comple-
ment input code representing midscale is loaded in the input
register. The AD1862 is a current output D/A converter. There-
fore, this error is expressed in μA.
FUNCTIONAL DESCRIPTION
The AD1862 is a high performance, monolithic 20-bit audio
DAC. Each device includes a voltage reference, a 20-bit DAC,
20-bit input latch and a 20-bit serial-to-parallel input register. A
special digital offset circuit, combined with segmentation cir-
cuitry, produces excellent THD+N and D-range performance.
Extensive noise-reduction features are utilized to make the noise
performance of the AD1862 as high as possible. For example,
the voltage reference circuit is a low-noise, 9 volt bandgap cell.
This cell supplies the reference voltage to the bipolar offset cir-
cuit and the DAC. An external noise-reduction capacitor is con-
nected to NR1 to form a low-pass filter network.
Additional noise-reduction techniques are used in the control
amplifier of the DAC. By connecting an external noise-reduction
capacitor to NR2 output noise contributions from the control
portion of the DAC are similarly reduced. The noise-reduction
efforts result in a signal-to-noise ratio of 120
The design of the AD1862 uses a combination of segmented de-
coder, R-2R topology and digital offset to produce low distor-
tion at all signal amplitudes. The digital offset technique shifts
the midscale output voltage (0 V) away from the MSB transition
of the device. Therefore, small amplitude signals are not af-
fected by an MSB change. An extra DAC cell is included to
avoid clipping the output at full scale.
The DAC supplies a ±1 mA output current to an external
I-to-V converter. An on-board 3 kΩ feedback resistor is also
supplied. Both the output current and feedback resistor are
laser-trimmed to ±2% tolerance, simplifying the selection of
external filter and/or deemphasis network components. The in-
put register and serial-to-parallel converter are fabricated with
CMOS logic gates. These gates allow the achievement of fast
switching speeds and low power consumption. Internal TTL-
to-CMOS converters are used to insure TTL and 5 V CMOS
compatibility.
AD1862
Analog Circuit Considerations
GROUNDING RECOMMENDATIONS
The AD1862 has two ground pins, designated analog ground
(AGND) and digital ground (DGND). The analog ground pin
is the “high-quality” ground reference for the device. The ana-
log ground pin should be connected to the analog common
point in the system. The reference bypass capacitor, the nonin-
verting terminal of the current-to-voltage conversion op amp,
and any output loads should be connected to this point. The
digital ground pin returns ground current from the digital logic
portions of the AD1862 circuitry. This pin should be connected
to the digital common point in the system.
As illustrated in Figure 7, AGND and DGND should be con-
nected together at one point in the system.
DGND
Figure 7. Grounding and Bypassing Recommendations
POWER SUPPLIES AND DECOUPLING
The AD1862 has four power supply input pins. ±VS provide the
supply voltages which operate the linear portions of the DAC in-
cluding the voltage reference and control amplifier. The ±VS
supplies are designed to operate with ±12 volts.
The ±VL supplies operate the digital portions of the chip includ-
ing the input shift register, the input latching circuitry and the
TTL-to-CMOS level shifters. The ±VL supplies are designed to
be operated from ±5 V to ±12 V supplies subject only to the
limitation that –VL may not be more negative than –VS.
Decoupling capacitors should be used on all power supply input
pins. Good engineering practice suggests that these capacitors
be placed as close as possible to the package pins and the com-
mon points. The logic supplies, ±VL, should be decoupled to
DGND and the analog supplies, ±VS, should be decoupled to
AGND.
EXTERNAL NOISE REDUCTION COMPONENTS
Two external capacitors are required to achieve low-noise opera-
tion. Their correct connection is illustrated in Figure 8. Capacitor
C1 is connected between the pin labeled NR1 and analog com-
mon. C1 forms a low-pass filter element which reduces noise con-
tributed by the voltage reference circuitry. The proper choice for
this capacitor is a tantalum type with value of 10 μF or more. This
capacitor should be connected to the package pins as closely as
possible. This will minimize the effects of parasitic inductance of
the leads and connections circuit connections.
Figure 8. Noise Reduction Capacitors
Capacitor C2 is connected between the pin labeled NR2 and the
negative analog supply, –VS. This capacitor reduces the portion
of output noise contributed by the control amplifier circuitry.
C2 should be chosen to be a tantalum capacitor with a value of
about 1 μF. Again, the connections between the AD1862 and
C2 should be made as short as possible.
The recommended values for C1 and C2 are 10 μF and 1 μF,
respectively. The ratio between C1 and C2 should be approxi-
mately 10. Additional noise reduction can be gained by choos-
ing slightly higher values for C1 and C2 such as 22 μF and
2.2μF. Figure 2 illustrates the noise performance of the
AD1862 with 10μF and 1 μF.
EXTERNAL AMPLIFIER CONNECTIONS
The AD1862 is a current-output D/A converter. Therefore, an
external amplifier, in combination with the on-board feedback
resistor, is required to derive an output voltage. Figure 9 illus-
trates the proper connections for an external operational ampli-
fier. The output of the AD1862 is intended to drive the
summing junction of an external current-to-voltage conversion
op amp. Therefore, the voltage on the output current pin of the
AD1862 should be approximately the same as that on the
AGND pin of the device.
The on-board 3 kΩ feedback resistor and the ±1 mA output
current typically have ±1% tolerance or less. This makes the
choice of external components very simple and eliminates addi-
tional trimming. For example, if a user wishes to derive an out-
put voltage higher than the ±3 V swing offered by the output
current and feedback resistor combination, all that is required is
to combine a standard value resistor with the feedback resistor
to achieve the appropriate output voltage swing. This technique
can be extended to include the choice of elements in the
deemphasis network, etc.

Partno	Mfg	Dc	Qty	Available	Descript
AD1862	AD	N/a	46	avai	Ultralow Noise 20-Bit Audio DAC