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AD1856
16-Bit PCM Audio D/A Converter
ANALOG
DEVICES
16-Bit POM Audio DAC
AD1856
FEATURES
0.0025% THD
Fast settling permits 2x, 4x, and 8x oversampling
t3 V output
Optional trim allows superlinear performance
t5 V to t12 V operation
16-lead plastic SOIC package
Serial input
APPLICATIONS
Compact disc players
Digital audio amplifiers
DAT recorders and players
Synthesizers and keyboards
GENERAL DESCRIPTION
The AD1856 is a monolithic, l6-bit pulse code modulation (PCM)
audio DAC. The device provides a voltage output amplifier, l6-bit
DAC, l6-bit serial-to-parallel input register, and voltage reference.
The digital portion of the AD1856 is fabricated with CMOS logic
elements that are provided by the Analog Devices, Inc., BiMOS II
process. The analog portion of the AD1856 is fabricated with
bipolar and MOS devices, as well as thin film resistors.
This combination of circuit elements, as well as careful design and
layout techniques, results in high performance audio playback.
Laser trimming of the linearity error affords extremely low total
harmonic distortion. An optional linearity trim pin is provided
to allow residual differential linearity error at midscale to be
eliminated. This feature is particularly valuable for low distortion
reconstructions of low amplitude signals. Output glitch is also
small, contributing to the overall high level of performance. The
output amplifier achieves fast settling and high slew rates, providing
a full i3 V signal at load currents of up to $8 mA. The output
amplifier is short-circuit protected and can withstand indefinite
shorts to ground.
The serial input interface consists of the clock, data, and latch
enable pins. The serial twos complement data-word is clocked
into the DAC, MSB first, by the external data clock. The latch
enable signal transfers the input word from the internal serial input
register to the parallel DAC input register. The input clock can
support a 10 MHz clock rate. The serial input port is compatible
with popular digital filter chips used in consumer audio products.
These filters operate at oversampling rates of 2x, 4x, and 8x the
sampling frequency.
Rev. C Document Feedback
Information fumished by Analog Devices is believed to be accurate and reliable However, no
responsibility is assumed byAnalog Devicesfor its use. norfbrany infringements ofpatems or other
rightsofthird parties thatmay resuhhom its use. Spedfitatitms subjecttochange without notice No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks arethe pmpertyoftheir respective owners.
FUNCTIONAL BLOCK DIAGRAM
16-BIT
REFERENCE - IOUT DAC
a F AUDIO
_ OUTPUT
16-BIT INPUT LATCH
16-BIT SERIAL-TO-PARALLEL
CONVERSION
CLK LE DATA
Figure l.
The AD1856 can operate with :5 V to 1-12 V power supplies,
making it suitable for both the portable and home-use markets.
The digital supplies, +VL and -Vu can be separated from the
analog supplies, +Vs and -Vs, for reduced digital crosstalk.
Separate analog and digital ground pins are also provided.
Power dissipation is 110 mW (typical) with i5 V supplies and
135 mW (typical) when t12 V supplies are used.
The AD1856 is packaged in a I6-lead plastic SOIC package
and incorporates the industry-standard pinout. Operation is
guaranteed over the temperature range of -25''C to +70°C and
over the voltage supply range of $4.75 V to i132 V.
PRODUCT HIGHLIGHTS
Total harmonic distortion is 100% tested.
MSB trim feature allows superlinear operation.
The AD1856 operates with :5 V to t12 V supplies.
Serial interface is compatible with digital filter chips.
1.5 ps settling time permits 2x, 4x, and 8x oversampling.
No external components are required.
96 dB dynamic range.
i3 V or i8 mA output capability.
I6-bit resolution.
. Twos complement serial input words.
. Low cost.
16-lead plastic SOIC package.
WWNQWPWN!‘
One Technology Way, PO. Box 9106, Norwood, MA 02062-9106, USA.
Tel: 781 .329.4700 ©q988-20" Analog Devices, Inc. All rights reserved.
Technical Support
AD1856
TABLE OF CONTENTS
Features B............................................................................................. 1
Applications _...................................................................................... 1
Functional Block Diagram B............................................................. 1
General Description _........................................................................ 1
Product Highlights ........................................................................... 1
Revision History w.............................................................................. 2
Specifications T.................................................................................... 3
Absolute Maximum Ratings w........................................................... 5
ESD Caution _................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Terminology _..................................................................................... 7
Theory of Operation ........................................................................ 8
Analog Circuit Considerations _...................................................... 9
Grounding Recommendations Q.................................................. 9
REVISION HISTORY
2/ 13-Rev. B to Rev. C
Updated Format w................................................................. Universal
Deleted I6-Lead DIP (N) Package ................................... Universal
Reorganized Layout w........................................................... Universal
Changes to Features Section, General Description
Section, and Product Highlights Section ...................................... 1
Changes to Total Harmonic Distortion Parameter
and Power Supply Parameter, Table 1 ............................................ 3
Changes to Power Dissipation Parameter, Table 1 ....................... 4
Deleted Figure 1; Renumbered Sequentially ................................. 4
Power Supplies and Decoupling .................................................. 9
Total Harmonic Distortion _......................................................... 9
Optional MSB Adjustment F....................................................... 10
Digital Circuit Considerations _..................................................... 11
Input Data Q.................................................................................. 11
Applications of the AD1856 PCM Audio DAC .......................... 12
One DAC per System _................................................................ 12
One DAC per Channel w............................................................. 12
Two DACs per Channel (Four-DAC System) ........................ 13
Digital Filtering and Oversampling F............................................ 14
Achieving 8x fs Oversampling with Two AD1856 Devices
and the Yamaha YM3414 _......................................................... 14
Outline Dimensions B...................................................................... 15
Ordering Guide _......................................................................... 15
Changes to Table 2 m............................................................................ 5
Changes to Figure 2 and Table 3 V..................................................... 6
Deleted Figure 14 and Dual DAC, 4x fs Oversampling
Architecture Section w......................................................................... 7
Changes to Grounding Recommendations Section,
Power Supplies and Decoupling Section, and Figure 3 ................ 9
Changes to Input Data Section p.................................................... 11
Changes to Digital Filtering and Oversampling Section .......... 14
Updated Outline Dimensions F...................................................... 15
Changes to Ordering Guide .......................................................... 15
Rev. C l Page 2 of 16
AD1856
SPECIFICATIONS
Typical values at TA = 25°C, VL = i5 V, and Vs = :5 V, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
RESOLUTION' 16 Bits
DIGITAL INPUTS
Input Voltage High, w, 2.4 +VL V
Input Voltage Low, VIL O 0.8 V
Input Current High, ls/ w, = +VL 1.0 pA
Input Current Low, Id VIL = 0.4V -1 0 pA
Clock Input Frequency" 10 MHz
ACCURACY
Gain Error 12.0 %
Bipolar Zero Error t30 mV
Differential Linearity Error $0.001 % of FSR
Noise at Bipolar Zero RMS, 20 Hz to 20 kHz 6 pV
TOTAL HARMONIC DISTORTION 990.5 Hz
0 dB ADI856RZ-K 0.002 0.00251 %
AD1856RZ 0.002 0.008‘ %
-20 dB AD1856RZ-K 0.018 0.020‘ %
AD1856RZ 0.018 0.040‘ %
-60 dB AD1856RZ-K 1.8 2.01 %
AD1856RZ 1.8 4.01 %
MONOTONICITY 15 Bits
DRIFT 0°C to 70°C
Total Drift :25 ppm of FSR/°C
Bipolar Zero Drift :4 ppm of FSR/°C
SETTLING TIME To i0.006% of FSR
Voltage Output 6 V step 1.5 ps
1 LSB step 1.0 ps
Slew Rate 9 V/ps
Current Output 1 mA step, 10 ft to 100 n load 350 ns
1 k0 load 350 ns
WARM-UPTIME 1 Minute
OUTPUT
Voltage Output Configuration
Bipolar Range :3 V
Output Current t8 mA
Output Impedance 0.1 n
Short-Circuit Duration Indefinite to ground
Current Output Configuration
Bipolar Range (130%) :10 mA
Output Impedance (i30%) 1.7 k0
POWER SUPPLY
Voltage, +VL and +Vs +Vs 2 +VL for operation 4.75 5 13.2 V
Voltage, -VL and -Vs -VL 2 -Vs for operation -13.2 -5 -4.75 V
Current, +l +VL and +Vs = 5 V, 10 MHz clock 10 151 mA
+VL and +Vs=12V,10MHzclock 12 mA
Current, -l -Vr, and -Vs = -5 V,1O MHz clock -1 2 -1 51 mA
-Vr and -Vs---12V, 10 MHz clock -15 mA
Rev.C I Page3 of16
AD185B
Parameter Test Conditions/Comments Min Typ Max Unit
POWER DISSIPATION 10 MHz clock
tVs and :VL=i5V 110 1501 mW
tVs and iVinlzv 135 mW
TEMPERATURE RANGE
Specification 0 +70 "C
Operational -25 +70 ''C
Storage -60 +100 ''C
1Tested on all production units at final test.
Rev. C l Page 4 of 16
ADI856
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
Table 2.
. may cause permanent damage to the device. This is a stress
Parameter Rating . l fu . l . f h d . h
+VL to DGND 0 V to 13.2V ratmg on y: . nctlona operattonvo t e. ev1ce att T or any
other conditions above those indicated 1n the operational
+VstoAGND 0Vto13.2V ti fthi f ti . ti li d E t b It
-VL to DGND -13.2 Vto 0V sec 1.011 o 1ypec1 1:1 ton lenO 1mpdled. (1',1ssu,r: o affso u e
-Vs t0 AGND -1 3.2 V to 0 V :lnahlmuril Ci,aitlii1t1,l.' con ttions or exten e perlo s may a ect
Digital Inputs to DGND -0.3 v to +h ewe re la Ill y.
AGND to DGND t0.3 V ESD CAUTION
Short-Circuit Protection Indefinite short to ground ESD (electrostatic discharge) sensitive device.
Soldering 10 sec 300°C Charged devices and circuit boards can discharge
' -60''C to +100°C A without detection. Although this product features
Storage Temperature Range
patented or proprietary protection circuitry, damage
dtstf,ly may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to
avoid performance degradation or loss of functionality.
Rev.C I Pages of16
AD185B
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
LATCH ‘V DAC
-Vs E 16-BIT -ts1trmT
DGND E 4 is
SERIAL
+Vr. E INPUT
NC E TT
CLK E- CONTROL
LE E" LOGIC
DATA E-l
-Vu E AD1856
E TRIM
E MSB ADO
E IOUT
E AGND
ctr)-,
El Vour
NC = NO CONNECT
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 -Vs Analog Power Supply, Negative
2 DGND Digital Ground
3 +VL Logic Power Supply, Positive
4 NC No Connection
5 CLK Data Clock Input
6 LE Latch Enable Input
7 DATA Serial Data Input
8 -Vr Logic Power Supply, Negative
9 Vow Voltage Output
10 RF Feedback Resistor
11 SJ Summing Junction
12 AGND Analog Ground
13 low Current Output
14 MSB ADJ MSB AdjustmentTerminal
15 TRIM MSB Trimming PotentiometerTerminal
16 +Vs Analog Power Supply, Positive
Rev. C l Page 60f 16
ADI856
TERMINOLOGY
Total Harmonic Distortion
Total harmonic distortion (THD) is defined as the ratio of the
square root of the sum of the squares of the harmonic values to
the value of the fundamental input frequency. THD is expressed
in percent (%) or decibels (dB).
THD is a measure of the magnitude and distribution of linearity
error and differential linearity error. The distribution of these
errors may be different, depending on the amplitude of the output
signal. Therefore, to be most useful, THD should be specified for
both large and small signal amplitudes.
Settling Time
Settling time is the time required for the output to reach and
remain within a specified error band about its final value, mea-
sured from the digital input transition. Settling time is the primary
measure of dynamic performance.
Dynamic Range
The dynamic range specification indicates the ratio of the small-
est signal that the converter can resolve to the largest signal it is
able to produce. As a ratio, it is usually expressed in decibels (dB).
The theoretical dynamic range of an n-bit converter is approx-
imately (6 X n) dB. In the case of the l6-bit AD1856, that is
96 dB. The actual dynamic range of a converter is less than the
theoretical value due to limitations imposed by noise, quantiza-
tion error, and other errors.
Bipolar Zero Error
Bipolar zero error is the deviation in the actual analog output
from the ideal output (0 V) when the twos complement input
code representing half scale (all Os) is loaded into the input
register.
Differential Linearity Error
Differential linearity error is the measure of the variation in
analog value, normalized to full scale, associated with a 1 LSB
change in the digital input. Monotonic behavior requires that
the differential linearity error not exceed 1 LSB in the negative
direction.
Monotonicity
A digital-to-analog converter is monotonic if the output either
increases or remains constant as the digital input increases.
Rev.C I Page 7of16
