AD1861N ,16-Bit/18-Bit, 16 X Fs PCM Audio DACsSPECIFICATIONSAMin Typ Max UnitsDIGITAL INPUTSV 2.0 +V VIH LV 0.8 VILI , V = V 1.0 μAIH IH LI , V = ..
AD1861N ,16-Bit/18-Bit, 16 X Fs PCM Audio DACsSpecifications subject to change without notice.16-BIT 16-BIT16-BIT 16-BIT –V +V–V +V 1 16S 1 16 S ..
AD1861N-J ,16-Bit/18-Bit, 16 X Fs PCM Audio DACsSPECIFICATIONSAMin Typ Max UnitsDIGITAL INPUTSV 2.0 +V VIH LV 0.8 VILI , V = V 1.0 μAIH IH LI , V = ..
AD1861R ,16-Bit/18-Bit, 16 X Fs PCM Audio DACsFEATURES110 dB SNRFast Settling Permits 163 Oversampling–V 1 +V16S LATCH SDAC63 V Output2 TRIMOptio ..
AD1861R-J ,16-Bit/18-Bit, 16 X Fs PCM Audio DACsspecifications of THD+N and signal-to-noise ratioThe AD1851/AD1861 is a monolithic PCM audio DAC. T ..
AD1862 ,Ultralow Noise 20-Bit Audio DACAPPLICATIONS +V4 13 NRL1High Performance Compact Disc PlayersCLK 5 12 AGNDINPUTDigital Audio Amplif ..
AD8319ACPZ-R7 , 1 MHz to 10 GHz, 40 dB Log Detector/Controller
AD831AP ,Low Distortion MixerSPECIFICATIONSall values in dBm assume 50 V load.)Parameter Conditions Min Typ Max UnitsRF INPUTBan ..
AD831APZ , Low Distortion Mixer
AD8320ARP ,Serial Digital Controlled Variable Gain Line DriverFEATURESFUNCTIONAL BLOCK DIAGRAM8-Bit Serial Gain ControlV/V/LSB Linear Gain ResponseVCC GND36 dB G ..
AD8321AR ,Gain Programmable CATV Line DriverSpecificationsREV. 0Information furnished by Analog Devices is believed to be accurate andreliable. ..
AD8321AR-REEL ,Gain Programmable CATV Line DriverFEATURES FUNCTIONAL BLOCK DIAGRAMLinear in dB Gain Response Over >53 dB RangeVCC GNDDrives Low Dist ..
AD1851N-AD1851N-J-AD1851R-AD1851R-J-AD1861N-AD1861N-J-AD1861R-AD1861R-J
16-Bit/18-Bit, 16 X Fs PCM Audio DACs
FUNCTIONAL BLOCK DIAGRAMREV.A
16-Bit/18-Bit, 16 3 FSPCM Audio DACs
FEATURES
110 dB SNR
Fast Settling Permits 163 Oversampling63 V Output
Optional Trim Allows Super-Linear Performance65 V Operation
16-Pin Plastic DIP and SOIC Packages
Pin-Compatible with AD1856 & AD1860 Audio DACs
2s Complement, Serial Input
APPLICATIONS
High-End Compact Disc Players
Digital Audio Amplifiers
DAT Recorders and Players
Synthesizers and Keyboards
PRODUCT DESCRIPTIONThe AD1851/AD1861 is a monolithic PCM audio DAC. The
AD1851 is a 16-bit device, while the AD1861 is an 18-bit de-
vice. Each device provides a voltage output amplifier, DAC,
serial-to-parallel register and voltage reference. The digital por-
tion of the AD1851/AD1861 is fabricated with CMOS logic
elements that are provided by Analog Devices’ 2 μm ABCMOS
process. The analog portion of the AD1851/AD1861 is fabri-
cated with bipolar and MOS devices as well as thin-film
resistors.
This combination of circuit elements, as well as careful design
and layout techniques, results in high performance audio play-
back. Laser-trimming of the linearity error affords low total har-
monic distortion. An optional linearity trim pin is provided to
allow residual differential linearity error at midscale to be elimi-
nated. This feature is particularly valuable for low distortion
reproductions of low amplitude signals. Output glitch is also
small, contributing to the overall high level of performance. The
output amplifier achieves fast settling and high slew rates, pro-
viding a full ±3 V signal at load currents up to 8 mA. When
used in current output mode, the AD1851/AD1861 provides a1 mA output signal. The output amplifier is short circuit
protected and can withstand indefinite shorts to ground.
The serial input interface consists of the clock, data and latch
enable pins. The serial 2s complement data word is clocked into
the DAC, MSB first, by the external clock. The latch enable
signal transfers the input word from the internal serial input
register to the parallel DAC input register. The AD1851 input
clock can support a 12.5 MHz data rate, while the AD1861 in-
put clock can support a 13.5 MHz data rate. This serial input
port is compatible with second generation digital filter chips
used in consumer audio products. These filters operate at over-
sampling rates of 23, 43, 83 and 163 sampling frequencies.
The critical specifications of THD+N and signal-to-noise ratio
are 100% tested for all devices.
The AD1851/AD1861 operates with ±5 V power supplies, mak-
ing it suitable for home use markets. The digital supply, VL, can
be separated from the analog supplies, VS and –VS, for reduced
digital crosstalk. Separate analog and digital ground pins are
also provided. Power dissipation is 100 mW typical.
The AD1851/AD1861 is available in either a 16-pin plastic DIP
or a 16-pin plastic SOIC package. Both packages incorporate
the industry standard pinout found on the AD1856 and
AD1860 PCM audio DACs. As a result, the AD1851/AD1861
is a drop-in replacement for designs where ±5 V supplies have
been used with the AD1856/AD1860. Operation is guaranteed
over the temperature range of –25°C to +70°C and over the
voltage supply range of ±4.75 V to ±5.25 V.
PRODUCT HIGHLIGHTSAD1851 16-bit resolution provides 96 dB dynamic range.
AD1861 18-bit resolution provides 108 dB dynamic range.No external components are required.Operates with ±5 V supplies.Space saving 16-pin SOIC and plastic DIP packages.100 mW power dissipation.High input clock data rates and 1.5 μs settling time permits
23, 43, 83 and 163 oversampling.±3 V or ±1 mA output capability.THD + Noise and SNR are 100% tested.Pin-compatible with AD1856 & AD1860 PCM audio DACs.
AD1851/AD1861–SPECIFICATIONS(TA @ +258C and 65 V supplies, unless otherwise noted)
NC = NO CONNECT
DGND
CLK
DATA
TRIM
MSB ADJ
AGND
–VS
+VL
+VS
IOUT
VOUTDIGITAL INPUTS
DRIFT (0°C to +70°C)
SETTLING TIME (To ±0.0015% of FSR)
OUTPUT
POWER SUPPLY
TEMPERATURE RANGE
Specifications subject to change without notice.
AD1851
AD1861
AD1851/AD1861
AD1851/AD1861
ABSOLUTE MAXIMUM RATINGS*VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . .0 V to 6.50 V
VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . .0 V to 6.50 V
–VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . .–6.50 V to 0 V
Digital Inputs to DGND . . . . . . . . . . . . . . . . . . .–0.3 V to VL
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . .±0.3 V
Short Circuit . . . . . . . . . . . . . . . . .Indefinite Short to Ground
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+300°C, 10 sec
Storage Temperature . . . . . . . . . . . . . . . . . .–60°C to +100°C
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PIN DESCRIPTIONS*Pin 8 has no internal connection; -VL from AD1856 or AD1860 socket can be
safely applied.
ORDERING GUIDE*N = Plastic DIP Package; R = Small Outline (SOIC) Package.
CAUTIONESD (electrostatic discharge) sensitive device. The digital control inputs are diode protected;
however, permanent damage may occur on unconnected devices subject to high energy electro-
static fields. Unused devices must be stored in conductive foam or shunts. The protective foam
should be discharged to the destination socket before devices are inserted.
Typical Performance
CLOCK FREQUENCY – MHz
PD – mWPower Dissipation vs. Clock Frequency
THD+N – %
TEMPERATURE – °C
TOTAL HARMONIC DISTORTIONTotal harmonic distortion plus noise (THD+N) is defined as
the ratio of the square root of the sum of the squares of the val-
ues of the first 19 harmonics and noise to the value of the funda-
mental input frequency. It is usually expressed in percent (%).
THD+N is a measure of the magnitude and distribution of lin-
earity error, differential linearity error, quantization error and
noise. The distribution of these errors may be different, depend-
ing on the amplitude of the output signal. Therefore, to be most
useful, THD+N should be specified for both large (0 dB) and
small signal amplitudes (–20 dB and –60 dB).
The THD+N figure of an audio DAC represents the amount of
undesirable signal produced during reconstruction and playback
of an audio waveform. This specification, therefore, provides a
direct method to classify and choose an audio DAC for a
desired level of performance.
SETTLING TIMESettling time is the time required for the output of the DAC to
reach and remain within a specified error band about its final
value, measured from the digital input transition. It is a primary
measure of dynamic performance.
MIDSCALE ERRORMidscale error, or bipolar zero error, is the deviation of the ac-
tual analog output from the ideal output (0 V) when the 2s
complement input code representing half scale is loaded in the
input register.
D-RANGE DISTORTIOND-range distortion is equal to the value of the total harmonic
distortion + noise (THD+N) plus 60 dB when a signal level of
–60 dB below full scale is reproduced. D-range is tested with a
1 kHz input sine wave. This is measured with a standard A-
weight filter as specified by EIAJ Standard CP-307.
SIGNAL-TO-NOISE RATIOThe signal-to-noise ratio (SNR) is defined as the ratio of the
amplitude of the output when a full-scale output is present to
the amplitude of the output with no signal present. This is mea-
sured with a standard A-weight filter as specified by EIAJ
Standard CP-307.
Figure 1.AD1851/AD1861 Functional Block Diagram
FUNCTIONAL DESCRIPTIONThe AD1851/AD1861 is a complete monolithic PCM audio
DAC. No additional external components are required for op-
eration. As shown in Figure 1 above, each chip contains a volt-
age reference, an output amplifier, a DAC, an input latch and a
parallel input register.
The voltage reference consists of a bandgap circuit and buffer
amplifier. This combination of elements produces a reference
voltage that is unaffected by changes in temperature and age.
The DAC output voltage, which is derived from the reference
voltage, is also unaffected by these environmental changes.
The output amplifier uses both MOS and bipolar devices to
produce low offset, high slew rate and optimum settling time.
When combined with the on-chip feedback resistor, the output
op amp converts the output current of the AD1851/AD1861 to
a voltage output.
The DAC uses a combination of segmented decoder and R-2R
architecture to achieve consistent linearity and differential lin-
earity. The resistors which form the ladder structure are fabri-
cated with silicon chromium thin film. Laser-trimming of these
resistors further reduces linearity error, resulting in low output
distortion.
The input register and serial-to-parallel converter are fabricated
with CMOS logic gates. These gates allow the achievement of
fast switching speeds and low power consumption. This contrib-
utes to the overall low power dissipation of the AD1851/
AD1861.
AD1851/AD1861
Analog Circuit Considerations
GROUNDING RECOMMENDATIONSThe AD1851/AD1861 has two ground pins, designated Analog
and Digital ground. The analog ground pin is the “high quality”
ground reference point for the device. The analog ground pin
should be connected to the analog common point in the system.
The output load should also be connected to that same point.
The digital ground pin returns ground current from the digital
logic portions of the AD1851/AD1861 circuitry. This pin
should be connected to the digital common point in the system.
As illustrated in Figure 2, the analog and digital grounds should
be connected together at one point in the system.
+–
ANALOG
GROUND
DIGITAL
GROUND
+5VFigure 2. Recommended Circuit Schematic
POWER SUPPLIES AND DECOUPLINGThe AD1851/AD1861 has three power supply input pins. TheVS supplies provide the supply voltages to operate the linear
portions of the DAC including the voltage reference, output am-
plifier and control amplifier. The ±VS supplies are designed to
operate at ±5 V.
The +VL supply operates the digital portions of the chip includ-
ing the input shift register and the input latching circuitry. The
+VL supply is designed to operate at +5 V.
Decoupling capacitors should be used on all power supply pins.
Furthermore, good engineering practice suggests that these ca-
pacitors be placed as close as possible to the package pins as
well as to the common points. The logic supply, +VL, should be
decoupled to digital common, while the analog supplies, ±VS,
should be decoupled to analog common.
The use of three separate power supplies will reduce feedthrough
from the digital portion of the system to the linear portion of the
system, thus contributing to improved performance.
However, three separate voltage supplies are not necessary for
good circuit performance. For example, Figure 3 illustrates a
system where only a single positive and a single negative supply
are available.
In this example, the positive logic and positive analog supplies
must both be connected to +5 V, while the negative analog sup-
ply will be connected to –5 V. Performance would benefit from
a measure of isolation between the supplies introduced by using
simple low pass filters in the individual power supply leads.
ANALOG
GROUND
DIGITAL
GROUND2
–5V+5VFigure 3.Alternate Recommended Schematic
As with most linear circuits, changes in the power supplies will
affect the output of the DAC. Analog Devices recommends that
well regulated power supplies with less than 1% ripple be incor-
porated into the design of any system using the AD1851/AD1861.
OPTIONAL MSB ADJUSTMENTUse of an optional adjustment circuit allows residual differential
linearity error around midscale to be eliminated. This error is
especially important when low amplitude signals are being re-
produced. In those cases, as the signal amplitude decreases, the
ratio of the midscale differential linearity error to the signal am-
plitude increases, thereby increasing THD.
Therefore, for best performance at low output levels, the op-
tional MSB adjust circuitry shown in Figure 4 may be used to
improve performance. The adjustment should be made with a
small signal input (–20 dB or –60 dB).
TRIM 470kΩ 100kΩ 200kΩ
MSB
ADJUST
–VSFigure 4.Optional THD Adjust Circuit
