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AD1315KZ
High Speed Active Load with Inhibit Mode
REV.A
High Speed Active Load
with Inhibit Mode
FUNCTIONAL BLOCK DIAGRAM
PRODUCT DESCRIPTIONThe AD1315 is a complete, high speed, current switching load
designed for use in linear, digital or mixed signal test systems.
By combining a high speed monolithic process with a unique
surface mount package, this product attains superb electrical
performance while preserving optimum packaging densities in
an ultrasmall 16-lead, hermetically sealed gull wing package.
Featuring current programmability of up to +50 mA, the
AD1315 is designed to force the device under test to source or
sink the programmed IOHPROG and IOLPROG currents. The IOH
and IOL currents are determined by applying a corresponding
voltage (5 V = 50 mA) to the IOH and IOL pins. The voltage-
to-current conversion is performed within the AD1315 thus
allowing the current levels to be set by a standard voltage out
digital-to-analog converter.
The AD1315’s transition from IOH to IOL occurs when the
output voltage of the device under test slews above or below the
programmed threshold, or commutation voltage. The commuta-
tion voltage is programmable from 2 V to +7 V, covering the
large spectrum of logic devices while able to support the large
current specifications (48 mA) typically associated with line
drivers. To test I/O devices, the active load can be switched into
a high impedance state (Inhibit mode) electrically removing the
active load from the path through the Inhibit mode feature. The
active load leakage current in Inhibit is typically 20 nA.
The Inhibit input circuitry is implemented utilizing high speed
differential inputs with a common-mode voltage range of 7 volts
and a maximum differential voltage of 4 volts. This allows for
the direct interface to the precision of differential ECL timing or
the simplicity of switching the Active Load from a single ended
TTL or CMOS logic source. With switching speeds from IOH
or Io~ into Inhibit of less than 1.5 ns, the AD1315 can be
electrically removed from the signal path “on-the-fly.”
The AD1315 is available in a 16-lead, hermetically sealed gull
wing package and is specified to operate over the ambient com-
mercial temperature range from 0°C to +70°C.
FEATURES
+50 mA Voltage Programmable Current Range
1.5 ns Propagation Delay
Inhibit Mode Function
High Speed Differential Inputs for Maximum Flexibility
Hermetically Sealed Small Gull Wing Package
Compatible with AD1321, AD1324 Pin Drivers
APPLICATIONS
Automatic Test Equipment
Semiconductor Test System
Board Level Test System
AD1315–SPECIFICATIONS
(All measurements made in free air at +258C. +VS = +10 V, –VS = –5.2 V, unless
otherwise noted.)OUTPUT CHARACTERISTICS
DYNAMIC PERFORMANCE
NOTESIOHPROG/IOLPROG voltage range may be extended to –100 mV due to a possible 1 mA offset current.IOHRTN/IOLRTN should be connected to VCOM to minimize power dissipation.VDUT = –2 V to +7 V, CTOTAL = 10 pF, RDUT = 10 Ω. For inhibit leakage tests, VDUT = 0 V to +5.9 V, IOH = –4 mA, IOL = +4 mA, TCASE = +36°C.Measured from the ECL crossing to the 10% change in the output current.IPROGRAM = ±50 mA.Maximum power dissipation with +VS = +10 V, –VS = 5.2 V, IPROGRAM 50 mA, VCOM = VDUT = 0 V.For a 1% change in +VS or VS, the output current may change a maximum of 0.05% of Full Scale Range (FSR).
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS1Power Supply Voltage
+VS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+12 V
–VS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–11 V
Difference from +VS to –VS . . . . . . . . . . . . . . . . . . . . .16 V
Inputs
Difference from INH to INH . . . . . . . . . . . . . . . . . . . . .5 V
INH, INH . . . . . . . . . . . . . . . . . .+VS – 13.4 V, –VS + 11 V
VCOM, VDUT . . . . . . . . . . . . . . .+VS – 13.1 V, –VS + 13.2 V
IOL, IOH Program Voltage . . . . . . . .+VS – 15 V, –VS + 15 V
Operating Temperature Range . . . . . . . . . . . . . . .0 to +70°C
Storage Temperature Range . . . . . . . . . . . .–65°C to +125°C
Lead Temperature Range (Soldering 20 sec)2 . . . . . . .+300°CStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.To ensure lead coplanarity (±0.002 inches) and solderability, handling with bare
hands should be avoided and the device should be stored in an environment at
24°C, ±5°C (75°F, ±10°F) with relative humidity not to exceed 65%.
CONNECTION DIAGRAM
SUGGESTED PAD LOCATIONDimensions shown in inches and (mm).
ORDERING GUIDE*Z = Leaded Chip Carrier (Ceramic).
AD1315
DEFINITION OF TERMS
GainThe measured transconductance.
Gain=IOUT(@5VInput)−IOUT(@0.2VInput)
VPROG(@5V)−VPROG(@0.2V)
where:
VPROG values are measured at IOL/IOH PROG
Gain ErrorThe difference between the measured transconductance and the
ideal expressed as a % of full-scale range.
Ideal Gain = 10 mA/V
GainError=IdealGain−ActualGain
IdealGain×100
Offset ErrorOffset Error is measured by setting the IOHPROG or IOLPROG
inputs to 0.2 V and measuring IOUT. Since both IOH and IOL
Figure 1.Definition of Terms
Figure 2.Timing Diagram for Inhibit Transition
outputs are unipolar, this small initial offset of 2 mA must be set
to allow for measurement of possible negative offset. With a gain
of 10 mA/V, a 0.2 V input should yield an output of ±2mA. The
difference between the observed output and the ideal ±2mA
output is the offset error.
Offset Error = IOUT (@ 0.2 V) – Gain 3 VPROG (@ 0.2 V)
Linearity ErrorThe deviation of the transfer function from a straight line de-
fined by Offset and Gain expressed as a % of FSR.
IOUT (calc) = Gain 3 VPROG (@ set point) + Offset
where:
set point = VPROG (from 0.2 V to 5 V)
IOUT (FSR) = Gain 3 VPROG (@ 5 V) + Offset
LinearityErrorIOUT(measured)−IOUT(calc)
IOUT(FSR)×100
Figure 3.IOL, IOH Offset Current vs.
Temperature
Figure 4.IOL, IOH Gain Error vs.
Temperature
Figure 5.IOL, IOH Linearity Error vs.
Current Program Voltage
Figure 6.+IMAX, –IMAX to Inhibit
Propagation Delay vs. Temperature
Figure 7.Inhibit to +IMAX, –IMAX
Propagation Delay vs. Temperature
Figure 8.Inhibit Mode Leakage Current vs. Case Temperature
Figure 9.AD1315 DC Test Circuit
AD1315
FUNCTIONAL DESCRIPTIONThe AD1315 is a complete high speed active load designed for
use in general purpose instrumentation and digital functional
test equipment. The function of the active load is to provide
independently variable source and sink currents for the device to
be tested.
The equivalent circuit for the AD1315 is shown in Figure 11.
An active load performs the function of loading the output of
the device under test with a programmed IOH or IOL. These
currents are independently programmable. VCOM is the commu-
tation voltage point at which the load switches from source to
sink mode. The active load may also be inhibited, steering cur-
rent to the IOLRTN and IOHRTN pins, effectively disconnecting it
from the test pin.
The AD1315 accepts differential digital signals at its inhibit
inputs ensuring precise timing control and high noise immunity.
The wide inhibit input voltage range allows for ECL power
supplies of –5.2 V and 0 V, –3.2 V and +2 V, and 0 V and +5 V.
Where speed and timing accuracy are less important, TTL or
CMOS logic levels may be used to toggle the Inhibit inputs of
the AD1315. Single ended operation is possible by biasing one
of the inputs to approximately +1.3 V for TTL or VCC/2 for
CMOS. Care should be taken to observe the 4 V maximum
allowable input voltage.
The IOH and IOL programming inputs accept 0 V to +5 V analog
inputs, corresponding to 0 to 50 mA output currents. The VCOM
input, which sets the IOH/IOL switch point, may be set anywhere
within the input range of –2 V to +7 V.
Figure 11.Block Diagram
VDUT VOLTAGE RANGEIn Figure 12, VDUT range, IOH and IOL typical current maxi-
mums are plotted versus DUT voltage. In the IOH mode (VDUT
higher than VCOM), the load will sink 50 mA, until its output
starts to saturate at approximately –1.5 V. In the IOL mode
(VDUT lower than VCOM), the load will source 50 mA until its
output starts to saturate at approximately +5.5 V. At +7 V, the
Figure 12.Allowable Current Range for IOH, IOL vs. VDUT
Ideally, the commutation point set at VCOM would provide in-
stantaneous current sink/source switching. Because of I/V
characteristics of the internal bridge diodes, this is not the case.
To guarantee full current switching at the DUT, at least a 1 volt
difference between VCOM and VDUT must be maintained in
steady state conditions. Because of the relatively fast edge rates
exhibited by typical logic device outputs, this should not be a
problem in normal ATE applications.
INHIBIT MODE LEAKAGEThe AD1315’s inhibit-mode leakage current changes with both
temperature and bias levels. There are two major contributing
effects: transistor reverse-bias collector-base leakage and reverse
leakage in the Schottky-diode bridge. Leakage variations with
VDUT arise primarily from transistor collector-base leakage,
while both effects contribute to leakage current temperature
variations. Inhibit-mode leakage is weakly dependent on VCOM
and decreases slightly as the difference between VDUT and VCOM
is reduced. Figure 8 shows typical AD1315 inhibit leakage cur-
rent as a function of VDUT and temperature.
THERMAL CONSIDERATIONSThe AD1315 is provided in a 0.550" 3 0.550", 16-lead (bottom
brazed) gull wing, surface mount package with a θJC of 10°C/W
(typ). Thermal resistance (case-to-ambient) vs. air flow for the
AD1315 in this package is shown in Figure 13. The data pre-
sented is for a ZIF socketed device. For PCB mounted devices
(w/30 mils clearance) the thermal resistance should be ~3 to 7%
lower with air flows below 320 lfm(1). Notice that the improve-
ment in thermal resistance vs. air flow starts to flatten out just
above 400 lfm(2).
NOTESIfm is air flow in linear feet/minute.For convection cooled systems, the minimum recommended airflow is 400 lfm.
