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AD10465BZ
Dual Channel, 14-Bit, 65 MSPS A/D Converter With Analog Input Signal Conditioning
REV.0
Dual Channel, 14-Bit, 65 MSPS A/D Converter
with Analog Input Signal Conditioning
FEATURES
Dual, 65 MSPS Minimum Sample Rate
Channel-to-Channel Matching, �0.5% Gain Error
Channel-to-Channel Isolation, >90 dB
DC-Coupled Signal Conditioning Included
Selectable Bipolar Input Voltage Range
(�0.5 V, �1.0 V, �2.0 V)
Gain Flatness up to 25 MHz: < 0.2 dB
80 dB Spurious-Free Dynamic Range
Two’s Complement Output Format
3.3 V or 5 V CMOS-Compatible Output Levels
1.75 W per Channel
Industrial and Military Grade
APPLICATIONS
Phased Array Receivers
Communications Receivers
FLIR Processing
Secure Communications
GPS Antijamming Receivers
Multichannel, Multimode Receivers
FUNCTIONAL BLOCK DIAGRAM
AINA3AINA2AINA1REF
AINB2AINB1
AINB3
ENCENCD11AD12AD13A (MSB)
D0B (LSB)D1BD3BD2BD4BD5BD6BD7BD8B
D9B
ENC
ENC
DRBOUT
D10B
D11B
D12B
D13B
REF
D0A (LSB)
D1A
D2A
D3A
D4A
D5A
D6A
D7A
D8A
D9A
D10A
DRAOUT
PRODUCT DESCRIPTIONThe AD10465 is a full channel ADC solution with on-module
signal conditioning for improved dynamic performance and fully
matched channel-to-channel performance. The module includes
two wide dynamic range AD6644 ADCs. Each AD6644 has a dc-
coupled amplifier front end including an AD8037 low distortion,
high bandwidth amplifier, providing a high input impedance
and gain, and driving the AD8138 single-to-differential ampli-
fier. The AD6644s have on-chip track-and-hold circuitry and
utilize an innovative multipass architecture to achieve 14-bit,MSPS performance. The AD10465 uses innovative high-
density circuit design and laser-trimmed thin-film resistor networks
to achieve exceptional matching and performance, while still
maintaining excellent isolation and providing for significant
board area savings.
The AD10465 operates with ±5.0 V for the analog signal condi-
tioning with a separate 5.0 V supply for the analog-to-digital
conversion and 3.3 V digital supply for the output stage. Each
channel is completely independent, allowing operation with
independent encode and analog inputs. The AD10465 also
offers the user a choice of analog input signal ranges to fur-
ther minimize additional external signal conditioning, while
still remaining general-purpose.
The AD10465 is packaged in a 68-lead Ceramic Gull Wing
package, footprint-compatible with the earlier generation AD10242
(12-bit, 40 MSPS) and AD10265 (12-bit, 65 MSPS). Manufac-
turing is done on Analog Devices, Inc. Mil-38534 Qualified
Manufacturers Line (QML) and components are available up to
Class-H (–40°C to +85°C). The AD6644 internal components
are manufactured on Analog Devices, Inc. high-speed comple-
mentary bipolar process (XFCB).
PRODUCT HIGHLIGHTSGuaranteed sample rate of 65 MSPS.Input amplitude options, user configurable.Input signal conditioning included; both channels matched
for gain.Fully tested/characterized performance.Footprint compatible family; 68-lead LCC.
AD10465–SPECIFICATIONSANALOG INPUT (AIN)
ENCODE INPUT (ENC, ENC)
SINAD
(AVCC = +5 V; AVEE = –5 V; DVCC = 3.3 V applies to each ADC unless otherwise noted.)
AD10465NOTESGain tests are performed on AIN1 input voltage range.Input Capacitance spec. combines AD8037 die capacitance and ceramic package capacitance.Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.All ac specifications tested by driving ENCODE and ENCODE differentially.Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%.Analog input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 65 MSPS. SNR
is reported in dBFS, related back to converter full power.Analog input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 65 MSPS.Analog input signal power swept from –1 dBFS to –60 dBFS; SFDR is ratio of converter full scale to worst spur.Both input tones at –7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product.Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel.Input driven to 2× and 4× AIN1 range for > four clock cycles. Output recovers inband in specified time with Encode = 65 MSPS.Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF will degrade performance.Supply voltage recommended operating range. AVCC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range
AVCC = 5.0 V to 5.25 V.
AD10465
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD10465 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS1NOTESAbsolute maximum ratings are limiting values applied individually, and beyond
which the serviceability of the circuit may be impaired. Functional operability is
not necessarily implied. Exposure to absolute maximum rating conditions for an
extended period of time may affect device reliability.Typical thermal impedance for “ES” package: θJC = 2.2°C/W; θJA = 24.3°C/W.
TEST LEVEL100% Production Tested.
II.100% Production Tested at 25°C, and sample tested at
specified temperatures. AC testing done on sample basis.
III.Sample Tested only.
IV.Parameter is guaranteed by design and characterization
testing.Parameter is a typical value only.
VI.100% production tested at temperature at 25°C, sample
tested at temperature extremes.
ORDERING GUIDE
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
68-Lead Ceramic Leaded Chip Carrier
AGNDB
AGNDB
AGNDB
AGNDB
REF
DRBOUT
AGNDB
AGNDA
AGNDA
DRAOUT
AVEE
D0A(LSBA)
D1A
D2A
D3A
D4A
D5A
AGNDB
ENCODEB
ENCODEB
DVCC
AGNDA AGNDA
A3
AGNDA AGNDA REF
A
B3
AGNDB AGNDB
A1
A2
AGNDB SHIELD
B1
B2
D6A
D7A
D8A
D9A
D10A
DGNDA
D13B(MSBB)
D12B
D11B
D10B
D9B
DGNDB
AVCC
