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93L28DMQB
Dual 8-Bit Shift Register
TL/F/10200
93L28
Dual
8-Bit
Shift
Register
June 1989
93L28
Dual 8-Bit Shift Register
General Description
The 93L28isa high speed serial storage element providingbitsof storageinthe formoftwo 8-bit registers. The
multifunctional capabilityofthis deviceis providedby sever- features:1) additional gatingis providedatthe inputto
both shift registersso thatthe inputis easily multiplexed
betweentwo sources;2)the clockof each register maybe
provided separatelyor together;3) boththe trueand com-
plementary outputsare provided from each 8-bit register,
and both registers maybe master cleared froma common
input.
Features 2-input multiplexer providedat data inputof each
register Gated clock input circuitry Both true and complementary outputs provided from
lastbitof each register Asynchronous master reset commonto both registers
Connection Diagram
Dual-In-Line Package
TL/F/10200–1
OrderNumber 93L28DMQBor 93L28FMQB
SeeNS Package Number J16Aor W16A
Logic Symbol
TL/F/10200–2
VCCePin16
GND ePin8
Pin DescriptionNames Data Select Input
D0,D1 Data Inputs Clock Pulse Input (Active HIGH)
Common(Pin9)
Separate(Pins7and10) Master Reset Input (Active LOW) LastStageOutput Complementary Output
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
