SN54HCT374J ,Octal D-type Edge-Triggered Flip-Flops with 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN54HCT540J ,Octal Buffers And Line Drivers With 3-State Outputs SN54HCT540, SN74HCT540 OCTAL BUFFERS AND LINE DRIVERSWITH 3-STATE OUTPUTSSCLS008C – MARCH 1984 – R ..
SN54HCT541J ,Octal Buffers And Line Drivers With 3-State Outputs SCLS306C − JANUARY 1996 − REVI ..
SN54HCT574J , OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54L98J , 4-BIT DATA SELECTORS/STORAGE REGISTERS
SN54L99J , 4-BIT RIGHT-SHIFT LEFT-SHIFT REGISTERS
SN74F541 ,Octal Buffers/Drivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F541DWR ,Octal Buffers/Drivers With 3-State Outputs SN54F541, SN74F541 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTSSDFS021A – D3126, JANUARY 1989 – REVI ..
SN74F541N ,Octal Buffers/Drivers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F541N ,Octal Buffers/Drivers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F541NSR ,Octal Buffers/Drivers With 3-State Outputsfeatures inputs and outputs onA8 Y7opposite sides of the package to facilitate 10 11GND Y8printed-c ..
SN74F541NSR ,Octal Buffers/Drivers With 3-State Outputslogic diagram (positive logic)1OE11 &OE11919 EN OE2OE22 182 18 A1 Y11A1 Y13 17A2 Y24 16A3 Y35 15A4 ..
8550701RA-SN54HCT374J-SNJ54HCT374FK-SNJ54HCT374J
Octal D-type Edge-Triggered Flip-Flops with 3-State Outputs
Typical tpd = 22 ns ±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max Inputs Are TTL-Voltage Compatible Eight D-Type Flip-Flops in a Single Package Full Parallel Access for Loadingdescription/ordering informationThese 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight flip-flops of the ’HCT374 devices are
edge-triggered D-type flip-flops. On the positive
transition of the clock (CLK) input, the Q outputs
are set to the logic levels that were set up at the
data (D) inputs.
An output-enable (OE) input places the eight
outputs in either a normal logic state (high or low
logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.1QOE5D8Q
GND
CLK
SN54HCT374... FK PACKAGE
(TOP VIEW)GND
CLK
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
