74VHCT541ASJX ,Octal Buffer/Line Driver with 3-STATE OutputsFeaturesand bus oriented transmitter/receivers. High Speed: t = 5.5 ns (typ) at V = 5VPD CCThis dev ..
74VHCT541ATTR ,OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74VHCT573A ,OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
74VHCT573AM ,OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING74VHCT573A Octal D-Type Latch with 3-STATE OutputsJanuary 1998Revised April 199974VHCT573AOctal D-T ..
74VHCT573AMTC ,Octal D-Type Latch with 3-STATE OutputsFeaturesThe VHCT573A is an advanced high speed CMOS octal High speed: t = 7.7 ns (typ) at T = 25°C ..
74VHCT573AMTCX ,Octal D-Type Latch with 3-STATE OutputsFunctional Description Truth TableThe VHCT573A contains eight D-type latches with 3-Inputs OutputsS ..
892NCF-101M , Fixed Inductors for Surface Mounting
74VHCT541AM-74VHCT541AMTC-74VHCT541AMTCX-74VHCT541ASJ-74VHCT541ASJX
Octal Buffer/Line Driver with 3-STATE Outputs
74VHCT541A Octal Buffer/Line Driver with 3-STATE Outputs June 1997 Revised April 1999 74VHCT541A Octal Buffer/Line Driver with 3-STATE Outputs Protection circuits ensure that 0V to 7V can be applied to General Description the input and output (Note 1) pins without regard to the The VHCT541A is an advanced high-speed CMOS device supply voltage. This device can be used to interface 3V to fabricated with silicon gate CMOS technology. It achieves 5V systems and two supply systems such as battery the high-speed operation similar to equivalent Bipolar backup. This circuit prevents device destruction due to mis- Schottky TTL while maintaining the CMOS low power dissi- matched supply and input voltages. pation. Note 1: Outputs in OFF-state. The VHCT541A is an octal buffer/line driver designed to be employed as memory and address drivers, clock drivers Features and bus oriented transmitter/receivers. � High Speed: t = 5.5 ns (typ) at V = 5V PD CC This device is similar in function to the VHCT244A while providing flow-through architecture (inputs on opposite side � Low power dissipation: I = 4 μA (max) at T = 25°C CC A from outputs). This pinout arrangement makes this device � Power down protection is provided on all inputs and especially useful as an output port for microprocessors, outputs allowing ease of layout and greater PC board density. � Pin and function compatible with 74HCT541 Ordering Code: Order Number Package Number Package Description 74VHCT541AM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74VHCT541ASJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHCT541AMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHCT541AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Truth Table Pin Descriptions Inputs Outputs Pin Names Description OE OE I 1 2 OE , OE 3-STATE Output Enable Inputs 1 2 LL H H I - I Inputs 0 7 HX X Z O - O 3-STATE Outputs 0 7 XH X Z LLL L H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level Z = High Impedance © 1999 DS500013.prf
