74VHCT14 ,Hex Schmitt InverterFeaturesThe VHCT14A is an advanced high speed CMOS Hex High speed: t = 5.0 ns (typ) at T = 25°CPD ..
74VHCT14A ,HEX SCHMITT INVERTERAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74VHCT14AM ,Hex Schmitt InverterFeaturesThe VHCT14A is an advanced high speed CMOS Hex
74VHCT14
Hex Schmitt Inverter
74VHCT14A Hex Schmitt Inverter December 1998 Revised March 1999 74VHCT14A Hex Schmitt Inverter General Description Features The VHCT14A is an advanced high speed CMOS Hex � High speed: t = 5.0 ns (typ) at T = 25°C PD A Schmitt Inverter fabricated with silicon gate CMOS technol- � High noise immunity: V = 2.0V, V = 0.8V IH IL ogy. The VHCT14A contains six independent inverters � Power down protection is provided on all inputs and out- which are capable of transforming slowly changing input puts signals into sharply defined, jitter-free output signals. � Low noise: V = 1.0V (max) Protection circuits ensure that 0V to 7V can be applied to OLP the input pins without regard to the supply voltage and to � Low power dissipation: the output pins with V = 0V. These circuits prevent CC I = 2 μA (max) @ T = 25°C CC A device destruction due to mismatched supply and input/ � Pin and function compatible with 74HCT14 output voltages. This device can be used to interface 3V to 5V systems and two supply systems such as battery backup. Ordering Code: Order Number Package Number Package Description 74VHCT14AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 74VHCT14ASJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHCT14AMTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHCT14AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Truth Table Pin Names Description AO A Inputs LH n O Outputs HL n © 1999 DS500147.prf
