74VHC574SJX ,Octal D-Type Flip-Flop with 3-STATE Outputs74VHC574 Octal D-Type Flip-Flop with 3-STATE OutputsMarch 1993Revised April 199974VHC574Octal D-Typ ..
74VHC574SJX ,Octal D-Type Flip-Flop with 3-STATE OutputsFeaturestechnology. It achieves the high speed operation similar toequivalent Bipolar Schottky TTL ..
74VHC574TTR ,OCTAL D-TYPE FLIP FLOP WITH 3-STATE OUTPUT NON INVERTINGAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74VHC574TTR ,OCTAL D-TYPE FLIP FLOP WITH 3-STATE OUTPUT NON INVERTINGABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage-0.5 to +7.0 VCCV DC Input ..
74VHC594MTR ,8 BIT SHIFT REGISTER WITH OUTPUT REGISTER74VHC5948 BIT SHIFT REGISTERWITH OUTPUT REGISTER■ HIGH SPEED: t = 4.2ns (TYP.) at V =5VPD CC■ LOW P ..
74VHC595 ,8-Bit Shift Register with Output Latches74VHC595 8-Bit Shift Register with Output LatchesAugust 1993Revised April 199974VHC5958-Bit Shift R ..
74VHC574MTC-74VHC574MTCX-74VHC574MX-74VHC574N-74VHC574SJ-74VHC574SJX
Octal D-Type Flip-Flop with 3-STATE Outputs
74VHC574 Octal D-Type Flip-Flop with 3-STATE Outputs March 1993 Revised April 1999 74VHC574 Octal D-Type Flip-Flop with 3-STATE Outputs cuit prevents device destruction due to mismatched supply General Description and input voltages. The VHC574 is an advanced high speed CMOS octal flip- flop with 3-STATE output fabricated with silicon gate CMOS Features technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the � High Speed: t = 5.6 ns (typ) at V = 5V PD CC CMOS low power dissipation. This 8-bit D-type flip-flop is � High Noise Immunity: V = V = 28% V (Min) NIH NIL CC controlled by a clock input (CP) and an output enable input � Power Down Protection is provided on all inputs (OE). When the OE input is HIGH, the eight outputs are in a high impedance state. � Low Noise: V = 0.6V (typ) OLP An input protection circuit ensures that 0V to 7V can be � Low Power Dissipation: I = 4 μA (Max) @ T = 25°C CC A applied to the input pins without regard to the supply volt- � Pin and Function Compatible with 74HC574 age. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This cir- Ordering Code: Order Number Package Number Package Description 74VHC574M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 74VHC574SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC574MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153 74VHC574N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description D –D Data Inputs 0 7 CP Clock Pulse Input OE 3-STATE Output Enable Input O –O 3-STATE Outputs 0 7 © 1999 DS011565.prf
