74VHC541SJX ,Octal Buffer/Line Driver with 3-STATE OutputsFeaturesemployed as memory and address drivers, clock drivers High Speed: t = 3.5 ns (typ) at V = 5 ..
74VHC541SJX ,Octal Buffer/Line Driver with 3-STATE OutputsGeneral Descriptionapplied to the input pins without regard to the supply volt-The VHC541 is an adv ..
74VHC541T ,OCTAL BUS BUFFER WITH 3 STATE OUTPUTS NON INVERTED74VHC541 OCTAL BUS BUFFERWITH 3 STATE OUTPUTS (NON INVERTED)n HIGH SPEED: t = 3.6 ns (TYP.) at V = ..
74VHC541TTR ,OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74VHC573 ,OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING74VHC573 74VHCT573OctalD-TypeLatchwithTRI-STATEOutputs#November199574VHC573 74VHCT573#OctalD-TypeLa ..
74VHC573M ,OCTAL D-TYPE LATCH WITH 3-STATE OUTPUTS NON INVERTING74VHC573OCTAL D-TYPE LATCHWITH 3 STATE OUTPUTS NON INVERTING■ HIGH SPEED: t = 5.0 ns (TYP.) at V =5 ..
74VHC541M-74VHC541MTC-74VHC541MTCX-74VHC541MX-74VHC541N-74VHC541SJ-74VHC541SJX
Octal Buffer/Line Driver with 3-STATE Outputs
74VHC541 Octal Buffer/Line Driver with 3-STATE Outputs August 1993 Revised April 1999 74VHC541 Octal Buffer/Line Driver with 3-STATE Outputs An input protection circuit insures that 0V to 7V can be General Description applied to the input pins without regard to the supply volt- The VHC541 is an advanced high-speed CMOS device age. This device can be used to interface 5V to 3V systems fabricated with silicon gate CMOS technology. It achieves and two supply systems such as battery backup. This cir- the high-speed operation similar to equivalent Bipolar cuit prevents device destruction due to mismatched supply Schottky TTL while maintaining the CMOS low power dissi- and input voltages. pation. The VHC541 is an octal buffer/line driver designed to be Features employed as memory and address drivers, clock drivers � High Speed: t = 3.5 ns (typ) at V = 5V and bus oriented transmitter/receivers. PD CC � Low power dissipation: I = 4 μA (max) at T = 25°C This device is similar in function to the VHC244 while pro- CC A viding flow-through architecture (inputs on opposite side � High noise immunity: V = V = 28% V (min) NIH NIL CC from outputs). This pinout arrangement makes this device � Power down protection is provided on all inputs especially useful as an output port for microprocessors, � Low noise: V = 0.9V (typ) allowing ease of layout and greater PC board density. OLP � Pin and function compatible with 74HC541 Ordering Code: Order Number Package Number Package Description 74VHC541M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74VHC541SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC541N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Logic Symbol IEEE/IEC Truth Table Pin Descriptions Inputs Outputs Pin Names Descriptions OE OE I 1 2 OE , OE 3-STATE Output Enable Inputs 1 2 LL H H I - I Inputs 0 7 HX X Z O - O 3-STATE Outputs 0 7 XH X Z LLL L H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level Z = High Impedance © 1999 DS011639.prf
