74VHC374MSCX , Octal D-Type Flip-Flop with 3-STATE OutputsFunctional Description Truth TableThe VHC374 consists of eight edge-triggered flip-flops withInputs ..
74VHC374MTC ,Octal D-Type Flip-Flop with 3-STATE OutputsFunctional Description Truth TableThe VHC374 consists of eight edge-triggered flip-flops withInputs ..
74VHC374MTCX ,Octal D-Type Flip-Flop with 3-STATE OutputsFunctional Description Truth TableThe VHC374 consists of eight edge-triggered flip-flops withInputs ..
74VHC374MX ,Octal D-Type Flip-Flop with 3-STATE OutputsGeneral Descriptioncuit prevents device destruction due to mismatched supplyThe VHC374 is an advanc ..
74VHC374MX ,Octal D-Type Flip-Flop with 3-STATE OutputsFeaturesequivalent Bipolar Schottky TTL while maintaining the High Speed: t = 5.4 ns (typ) at V = 5 ..
74VHC374MX ,Octal D-Type Flip-Flop with 3-STATE OutputsFunctional Description Truth TableThe VHC374 consists of eight edge-triggered flip-flops withInputs ..
88E1040 , Alaska® Quad Gigabit Ethernet Transceivers
74VHC374MSCX
Octal D-Type Flip-Flop with 3-STATE Outputs
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs November 1992 Revised April 1999 74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs and two supply systems such as battery back up. This cir- General Description cuit prevents device destruction due to mismatched supply The VHC374 is an advanced high speed CMOS octal flip- and input voltages. flop with 3-STATE output fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to Features equivalent Bipolar Schottky TTL while maintaining the � High Speed: t = 5.4 ns (typ) at V = 5V CMOS low power dissipation. This 8-bit D-type flip-flop is PD CC controlled by a clock input (CP) and an output enable input � High noise immunity: V = V = 28% V (Min) NIH NIL CC (OE). When the OE input is HIGH, the eight outputs are in � Power down protection is provided on all inputs a HIGH impedance state. � Low power dissipation: I = 4 μA (Max) @ T = 25°C CC A An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply volt- � Pin and function compatible with 74HC374 age. This device can be used to interface 5V to 3V systems Ordering Code: Order Number Package Number Package Description 74VHC374M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 74VHC374SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC374MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC374N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description D –D Data Inputs 0 7 CP Clock Pulse Input OE 3-STATE Output Enable Input O –O 3-STATE Outputs 0 7 © 1999 DS011538.prf
