74VHC273T Fast Delivery |IC PHOENIX CO.,LIMITED

74VHC273T ,OCTAL D-TYPE FLIP FLOP WITH CLEAR74VHC273 OCTAL D-TYPE FLIP FLOP WITH CLEARPRELIMINARY DATAn HIGH SPEED:f = 165 MHz (TYP.) at V =5V ..
74VHC27M ,Triple 3-Input NOR Gate74VHC27 Triple 3-Input NOR GateJuly 1994Revised February 200574VHC27Triple 3-Input NOR Gate
74VHC27MTC ,Triple 3-Input NOR GateFeaturesThe VHC27 is an advanced high speed CMOS 3-Input

74VHC273T
OCTAL D-TYPE FLIP FLOP WITH CLEAR
74VHC273
OCTAL D-TYPE FLIP FLOP WITH CLEAR
PRELIMINARY DATA
October 1999 HIGH SPEED:
fMAX= 165MHz(TYP.)at VCC =5V LOWPOWER DISSIPATION:
ICC =4 μA (MAX.)atTA =25oC HIGH NOISE IMMUNITY:
VNIH =VNIL =28% VCC (MIN.) POWERDOWN PROTECTIONON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL=8 mA(MIN) BALANCED PROPAGATIONDELAYS:
tPLH≅ tPHL OPERATINGVOLTAGERANGE:
VCC (OPR)= 2Vto 5.5V PIN AND FUNCTION COMPATIBLE WITH SERIES273 IMPROVEDLATCH-UP IMMUNITY LOWNOISEVOLP= 0.9V(Max.)
DESCRIPTION
The 74VHC273 is an advanced high-speed
CMOS OCTAL D-TYPE FLIP FLOP WITH
CLEAR fabricated with sub-micron silicon gate
and double-layer metal wiring C2 MOS
technology.
Information signals applied to D inputs are
transferedto theQ outputson the positive going
edgeof the clock pulse.
When the CLEAR inputis held low, theQ outputs
are held low independentlyof the other inputs.
Power down protectionis provided on all inputs
and0to 7V can be acceptedon inputs with no
regardto the supply voltage. This device canbe
usedto interface5Vto 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES:
74VHC273M 74VHC273T
(Micro Package)
(TSSOP Package)
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INPUT EQUIVALENT CIRCUIT
LOGIC DIAGRAMS
PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION CLEAR Asyncronous Master
Reset (Active LOW)5,6,9,
12, 15,16,toQ7 Flip-Flop Outputs4,7,8,
13, 14,17,toD7 Data Inputs CLOCK Clock Input
(LOW-to-HIGH, Edge-
Triggered) GND Ground (0V) VCC Positive Supply Voltage
TRUTH TABLE
INPUTS OUTPUTS FUNCTION
CLEAR D CLOCK Q X X L CLEAR L H Qn NO CHANGE
X:Don’t Care
Thislogicdiagram hasnotbeusedtoesimate propagation delays
74VHC273
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ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Supply Voltage -0.5to +7.0 V DC Input Voltage -0.5to +7.0 V DC Output Voltage -0.5to VCC+ 0.5 V
IIK DC Input Diode Current -20 mA
IOK DC Output Diode Current ±20 mA DC Output Current ±25 mA
ICCor IGND DC VCCor Ground Current ±75 mA
Tstg Storage Temperature -65to +150 oC Lead Temperature (10 sec) 300 oC
AbsoluteMaximumRatingsarethosevalues beyond whichdamage tothedevicemayoccur. Functionaloperationunderthese condition isnot implied.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
VCC Supply Voltage 2.0to5.5 V Input Voltage 0to5.5 V Output Voltage 0to VCC V
Top Operating Temperature -40to +85 oC
dt/dv Input Rise and Fall Time (see note1) (VCC =3.3± 0.3V)
(VCC =5.0± 0.5V)to 100
0to20
ns/V
ns/V
1)VINfrom30%to70%ofVCC SPECIFICATIONS
Symbol Parameter Test Conditions Value Unit
VCC
(V) =25oC -40to85oC
Min. Typ. Max. Min. Max.
VIH High Level Input
Voltage
2.0 1.5 1.5 V
3.0to5.5 0.7VCC 0.7VCC
VIL Low Level Input
Voltage
2.0 0.5 0.5 V
3.0to5.5 0.3VCC 0.3VCC
VOH High Level Output
Voltage
2.0 IO=-50μA 1.9 2.0 1.9
3.0 IO=-50μA 2.9 3.0 2.9
4.5 IO=-50μA 4.4 4.5 4.4
3.0 IO=-4 mA 2.58 2.48
4.5 IO=-8 mA 3.94 3.8
VOL Low Level Output
Voltage
2.0 IO=50μA 0.0 0.1 0.1
3.0 IO=50μA 0.0 0.1 0.1
4.5 IO=50μA 0.0 0.1 0.1
3.0 IO=4 mA 0.36 0.44
4.5 IO=8 mA 0.36 0.44 Input Leakage Current 0 to5.5 VI= 5.5Vor GND ±0.1 ±1.0 μA
ICC Quiescent Supply
Current
5.5 VI =VCCor GND 4 40 μA
74VHC273
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CAPACITIVE CHARACTERISTICS
Symbol Parameter Test Conditions Value Unit =25oC -40to85oC
Min. Typ. Max. Min. Max.
CIN Input Capacitance 4 10 10 pF
CPD Power Dissipation
Capacitance (note1) pF
1)CPDisdefinedasthevalueoftheIC’sinternalequivalentcapacitance whichiscalculatedfromtheoperatingcurrentconsumption withoutload.(Referto
TestCircuit).Average operatingcurrent canbeobtained bythefollowingequation. ICC(opr)= CPD• VCC• fIN+ICC/8(per Flip-Flop) ELECTRICAL CHARACTERISTICS (Inputtr =tf=3 ns)
Symbol Parameter Test Condition Value Unit
VCC
(V)
(pF) =25oC -40to85oC
Min. Typ. Max. Min. Max.
tPLH
tPHL
Propagation Delay
TimetoQ
3.3(*) 15 8.7 13.6 1.0 16.03.3(*) 50 11.2 17.1 1.0 19.5
5.0(**) 15 5.8 9.0 1.0 10.5
5.0(**) 50 7.3 11.0 1.0 12.5
tPHL Propagation Delay
Time
CLRtoQ
3.3(*) 15 8.9 13.6 1.0 16.03.3(*) 50 11.4 17.1 1.0 19.5
5.0(**) 15 5.2 8.5 1.0 10.0
5.0(**) 50 6.7 10.5 1.0 12.0 CLR pulse Width
LOW
3.3(*) 5.0 6.0 ns
5.0(**) 5.0 5.0 CK pulse Width
HIGHor LOW
3.3(*) 5.5 6.5 ns5.0(**) 5.0 5.0 Setup TimeDto CK
HIGHor LOW
3.3(*) 5.5 6.5 ns5.0(**) 4.5 4.5 Hold TimeDtoCK
HIGHor LOW
3.3(*) 1.0 1.0 ns5.0(**) 1.0 1.0
tREM Removal Time
CLRto CK
3.3(*) 2.5 2.5 ns5.0(**) 2.0 2.0
fMAX Maximum Clock
Frequency
3.3(*) 15 75 120 65
MHz3.3(*) 50 50 75 45
5.0(**) 15 120 165 100
5.0(**) 50 80 110 70
tOSLH
tOSHL
Outputto Output Skew
Time (note1)
3.3(*) 50 1.5 1.5 ns
5.0(**) 50 1.0 1.0
(*) Voltagerangeis3.3V ±0.3V
(**) Voltagerangeis 5V±0.5V
Note1:Parameterguaranteed bydesign.tsoLH=|tpLHm-tpLHn|,tsoHL=|tpHLm-tpHLn|
74VHC273
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DYNAMIC SWITCHING CHARACTERISTICS
Symbol Parameter Test Conditions Value Unit
VCC
(V) =25oC -40to85oC
Min. Typ. Max. Min. Max.
VOLP Dynamic Low Voltage
Quiet Output (note1,2)
5.0 =50pF
0.6 0.9
VOLV -0.9 -0.6
VIHD Dynamic High Voltage
Input (note1,3)
5.0 3.5
VILD Dynamic Low Voltage
Input (note1,3)
5.0 1.5
1)Worst case package.
2)Maxnumber ofoutputs defined as(n).Datainputs aredriven0Vto5.0V,(n -1)outputs switching andoneoutput atGND.
3)Maxnumber ofdatainputs(n)switching.(n-1)switching0Vto5.0V.Inputsunder testswitching: 5.0Vtothreshold(VILD),0Vtothreshold(VIHD),f=1MHz.
TEST CIRCUIT =15/50 pForequivalent (includes jigand probecapacitance)
RT=ZOUTofpulsegenerator (typically50Ω)
74VHC273
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WAVEFORM1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)
74VHC273
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Partno	Mfg	Dc	Qty	Available	Descript
74VHC273T	ST	N/a	106	avai	OCTAL D-TYPE FLIP FLOP WITH CLEAR