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74VHC163MFAIRCHILN/a18avai4-Bit Binary Counter with Synchronous Clear
74VHC163MTCFAIRCHILN/a60avai4-Bit Binary Counter with Synchronous Clear
74VHC163SJFAIN/a69avai4-Bit Binary Counter with Synchronous Clear


74VHC163SJ ,4-Bit Binary Counter with Synchronous ClearFunctional DescriptionThe VHC163 counts in modulo-16 binary sequence. From The Terminal Count (TC) ..
74VHC164 ,Serial-In, Parallel-Out Shift RegisterFeaturesYLow power dissipation:The VHC164 is an advanced high-speed CMOS device fab-e eI 4 mA (max) ..
74VHC164FT ,74VHC CMOS logic IC seriesabsolute maximum ratings, even briefly, lead to deterioration in IC performance or evendestruction. ..
74VHC164M ,8-Bit Serial-In Parallel-Out Shift RegisterFunctional Description Function TableThe VHC164 is an edge-triggered 8-bit shift register withOpera ..
74VHC164MTC ,8-Bit Serial-In Parallel-Out Shift Registerfeatures an asynchronousMaster Reset which clears the register, setting all outputsLOW independent ..
74VHC164MTCX ,8-Bit Serial-In Parallel-Out Shift RegisterFeaturesThe VHC164 is an advanced high-speed CMOS device

74VHC163M-74VHC163MTC-74VHC163SJ
4-Bit Binary Counter with Synchronous Clear
74VHC163 4-Bit Binary Counter with Synchronous Clear September 1995 Revised February 2002 74VHC163 4-Bit Binary Counter with Synchronous Clear An input protection circuit insures that 0V to 7V can be General Description applied to the input pins without regard to the supply volt- The VHC163 is an advanced high-speed CMOS device age. This device can be used to interface 5V to 3V systems fabricated with silicon gate CMOS technology. It achieves and two supply systems such as battery backup. This cir- the high-speed operation similar to equivalent Bipolar cuit prevents device destruction due to mismatched supply Schottky TTL while maintaining the CMOS low power dissi- and input voltages. pation. The VHC163 is a high-speed synchronous modulo-16 Features binary counter. This device is synchronously presettable for High speed: f = 185 MHz (typ) at V = 5V application in programmable dividers and has two types of MAX CC Count Enable inputs plus a Terminal Count output for ver-Low power dissipation: I = 4 μA (max) at T = 25°C CC A satility in forming multistage counters. The CLK input is Synchronous counting and loading active on the rising edge. Both PE and MR inputs are High-speed synchronous expansion active on low logic level. Presetting is synchronous to rising High noise immunity: V = V = 28% V (min) edge of CLK and the Clear function of the VHC163 is syn- NIH NIL CC chronous to CLK. Two enable inputs (ENP and ENT) and Power down protection is provided on all inputs. Carry Output are provided to enable easy cascading of Low noise: V = 0.8V (max) OLP counters, which facilitates easy implementation of n-bit Pin and function compatible with 74HC163 counters without using external gates. Ordering Code: Order Number Package Number Package Description 74VHC163M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC163SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC163MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC163N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC © 2002 DS012122
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