74VHC157 ,QUAD 2 CHANNEL MULTIPLEXERLogic Diagram 2/1274VHC157Table 4:
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74VHC157
QUAD 2 CHANNEL MULTIPLEXER
1/12November 2004 HIGH SPEED: tPD = 4.1 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION:
ICC = 4 μA (MAX.) at TA=25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: PLH ≅ t PHL OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 157 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (MAX.)
DESCRIPTIONThe 74VHC157 is an advanced high-speed
CMOS QUAD 2-CHANNEL MULTIPLEXER
fabricated with sub-micron silicon gate and
double-layer metal wiring C2 MOS technology.
It consists of four 2-input digital multiplexer with
common select and strobe inputs. It is a
non-inverting multiplexer. When the STROBE
input is held high selection of data is inhibited and
all the outputs become low. The SELECT
decoding determines whether the A or B inputs
get routed to their corresponding Y outputs.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V. All inputs and outputs
are equipped with protection circuits against static
discharge, giving them 2KV ESD immunity and
transient excess voltage.
74VHC157QUAD 2 CHANNEL MULTIPLEXER
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes Rev. 4
74VHC1572/12
Figure 2: Input Equivalent Circuit Table 2: Pin Description
Table 3: Truth Table X : Don’t care
Figure 3: Logic Diagram
74VHC1573/12
Table 4: Absolute Maximum Ratings Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Table 5: Recommended Operating Conditions 1) VIN from 30% to 70% of VCC
74VHC1574/12
Table 6: DC Specifications
Table 7: AC Electrical Characteristics (Input tr = tf = 3ns)
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
74VHC1575/12
Table 8: Capacitive Characteristics 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per
channel)
Table 9: Dynamic Switching Characteristics 1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
Figure 4: Test Circuit CL =15/50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
74VHC1576/12
Figure 5: Waveform - Propagation Delays For Inverting Conditions
Figure 6: Waveform - Propagation Delays For Non-inverting Conditions
