74VHC02 ,Quad 2-Input NOR GateGeneral Descriptiondue to mismatched supply and input voltages.The VHC02 is an advanced high-speed ..
74VHC02M ,Quad 2-Input NOR GateFeaturesThe VHC02 is an advanced high-speed CMOS 2-Input
74VHC02
Quad 2-Input NOR Gate
74VHC02 Quad 2-Input NOR Gate November 1992 Revised March 1999 74VHC02 Quad 2-Input NOR Gate as battery backup. This circuit prevents device destruction General Description due to mismatched supply and input voltages. The VHC02 is an advanced high-speed CMOS 2-Input NOR Gate fabricated with silicon gate CMOS technology. It Features achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low � High Speed: t = 3.6 ns (typ) at V = 5V PD CC power dissipation. The internal circuit is composed of 3 � Low power dissipation: I = 2 μA (max) at T = 25°C CC A stages, including buffer output, which provide high noise � High noise immunity: V = V = 28% V (min) NIH NIL CC immunity and stable output. An input protection circuit insures that 0V to 7V can be applied to the input pins with- � Power down protection is provided on all inputs out regard to the supply voltage. This device can be used � Low noise: V = 0.8V (max) OLP to interface 5V to 3V systems and two supply systems such � Pin and function compatible with 74HC02 Ordering Code: Order Number Package Number Package Description 74VHC02M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 74VHC02SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC02MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC02N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Truth Table Pin Names Description AB O A , B Inputs n n LL H O Outputs n LH L HL L HH L © 1999 DS011515.prf
