74VCX32500GX ,Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and OutputsFeaturesThe VCX32500 is an 36-bit universal bus transceiver which
74VCX32500GX
Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs
74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs March 2001 Revised August 2003 74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32500 is an 36-bit universal bus transceiver which1.4V to 3.6V V supply operation CC combines D-type latches and D-type flip-flops to allow data 3.6V tolerant inputs and outputs flow in transparent, latched, and clocked modes. t (A to B, B to A) PD Data flow in each direction is controlled by output-enable 2.9 ns max for 3.0V to 3.6V V (OEAB and OEBA), latch-enable (LEAB and LEBA), and CC clock (CLKAB and CLKBA) inputs. For A-to-B data flow, thePower-down high impedance inputs and outputs device operates in the transparent mode when LEAB is Supports live insertion/withdrawal (Note 1) HIGH. When LEAB is LOW, the A data is latched if CLKAB Static Drive (I /I ) OH OL is held at a HIGH or LOW logic level. If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the HIGH-to-LOW ±24 mA @ 3.0V V CC transition of CLKAB. When OEAB is HIGH, the outputs are Uses patented noise/EMI reduction circuitry active. When OEAB is LOW, the outputs are in a high- Latchup performance exceeds 300 mA impedance state. ESD performance: Data flow for B to A is similar to that of A to B but uses Human body model > 2000V OEBA, LEBA, and CLKBA. The output enables are com- plementary (OEAB is active HIGH and OEBA is active Machine model >200V LOW). Packaged in plastic Fine-Pitch Ball Grid Array (FBGA) The VCX32500 is designed for low voltage (1.4V to 3.6V) V applications with I/O capability up to 3.6V. CC The 74VCX32500 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain- ing low CMOS power dissipation. Note 1: To ensure the high-impedance state during power up or power down, OEBA should be tied to V through a pull-up resistor and OEAB CC should be tied to GND through a pull-down resistors; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74VCX32500G BGA114A 114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 2)(Note 3) Note 2: Ordering Code “G” indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2003 DS500403
