74VCX16835MTD ,Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and OutputsFeaturesThe VCX16835 low voltage 18-bit universal bus driver
74VCX16835MTD
Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs
74VCX16835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs October 1998 Revised August 2001 74VCX16835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs General Description Features The VCX16835 low voltage 18-bit universal bus driverCompatible with PC100 DIMM module specifications combines D-type latches and D-type flip-flops to allow data1.65V–3.6V V supply operation CC flow in transparent, latched and clocked modes. 3.6V tolerant inputs and outputs Data flow is controlled by output-enable (OE), latch-enable t (CLK to O ) PD n (LE), and clock (CLK) inputs. The device operates in 4.2ns max for 3.0V to 3.6V V Transparent Mode when LE is held HIGH. The device CC 5.2ns max for 2.3V to 2.7V V operates in clocked mode when LE is LOW and CLK is tog- CC gled. Data transfers from the Inputs (I ) to Ouputs (O ) on a 9.2ns max for 1.65V to 1.95V V n n CC Positive Edge Transition of the Clock. When OE is LOW, Power-down high impedance inputs and outputs the output data is enabled. When OE is HIGH the output Supports live insertion/withdrawal (Note 1) port is in a high impedance state. Static Drive (I /I ) OH OL The 74VCX16835 is designed for low voltage (1.65V to ±24mA @ 3.0V 3.6V) V applications with I/O capability up to 3.6V. CC ±18mA @ 2.3V The 74VCX16835 is fabricated with an advanced CMOS ±6mA @ 1.65V technology to achieve high speed operation while maintain- Latchup performance exceeds 300 mA ing low CMOS power dissipation. ESD performance: Human body model > 2000V Machine model >200V Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary) Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to V (OE to GND) through a pulldown resistor; CC the minimum value of the resistor is determined by the current sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74VCX16835GX BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 2) (Preliminary) [TAPE and REEL] 74VCX16835MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 3) Note 2: BGA package available in Tape and Reel only. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2001 DS500173
