74VCX16721 ,Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and OutputsFunctional DescriptionThe VCX16721 contains twenty D-type flip-flops with 3-STATE standard outputs. ..
74VCX16721MTD ,Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and OutputsFunctional DescriptionThe VCX16721 contains twenty D-type flip-flops with3-STATE standard outputs. ..
74VCX16721MTDX ,Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputsapplications with I/O compatibility up to 3.6V. CCCC
74VCX16721
Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs
74VCX16721 Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs March 1998 Revised December 2001 74VCX16721 Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs General Description Features The VCX16721 contains twenty non-inverting D-type flip-1.8V–3.6V V supply operation CC flops with 3-STATE outputs and is intended for bus oriented 3.6V tolerant inputs and outputs applications. t (CLK to O ) PD n The 74VCX16721 is designed for low voltage (1.65V to 3.5 ns max for 3.0V to 3.6V V 3.6V) V applications with I/O compatibility up to 3.6V. CC CC 4.4 ns max for 2.3V to 2.7V V CC The 74VCX16721 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain- 8.8 ns max for 1.65V to 1.95V V CC ing low CMOS power dissipation. Power-off high impedance inputs and outputs Supports live insertion and withdrawal (Note 1) Static Drive (I /I ) OH OL ±24 mA @ 3.0V V CC ±18 mA @ 2.3V V CC ±6 mA @ 1.65V V CC Uses patented noise/EMI reduction circuitry Latch-up performance exceeds 300 mA ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to V through a pull-up resistor; the minimum CC value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74VCX16721MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) CLK Clock Input D –D Inputs 0 19 O –O Outputs 0 19 CE Clock Enable Input (Active LOW) © 2001 DS500143
