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74LX1G126CTR-74LX1G126STR
LOW VOLTAGE SINGLE BUS BUFFER (3-STATE)
1/12October 2002 5V TOLERANT INPUTS HIGH SPEED:tPD= 4.5ns (MAX.)at VCC =3V LOW POWER DISSIPATION:
ICC =1μA(MAX.)atTA =25°C POWER DOWN PROTECTIONON INPUTS
AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL= 24mA (MIN)at VCC =3V BALANCED PROPAGATION DELAYS:
tPLH≅ tPHL OPERATING VOLTAGE RANGE:
VCC(OPR)= 1.65Vto 5.5V
(1.2V Data Retention) IMPROVED LATCH-UP IMMUNITY
DESCRIPTIONThe 74LX1G126isa low voltage CMOS SINGLE
BUS BUFFER fabricated with sub-micron silicon
gate and double-layer metal wiringC2 MOS
technology.
3-STATE control inputG hastobeset LOWto
placethe output intothe high impedance state.
Power down protectionis providedonall inputs
and0to7V canbe acceptedon inputs withno
regardtothe supply voltage. This device canbe
usedto interface5Vto3V.
All inputs and outputs are equipped with
protection circuits against static discharge.
74LX1G126SINGLE BUS BUFFER (3-STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74LX1G1262/12
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION TRUTH TABLE: Don’tCare:High Impedance
ABSOLUTE MAXIMUM RATINGSAbsoluteMaximum Ratingsare those values beyond which damagetothe devicemay occur. Functional operationunder these conditionsis
not impliedIO absolute maximum rating mustbe observedVO
VCC
74LX1G126
3/12
RECOMMENDED OPERATING CONDITIONS Truth Table guaranteed:1.2Vto3.6VVINfrom0.8Vto2VatVCC =3.0V
74LX1G126
4/12 SPECIFICATIONS
74LX1G126
5/12 ELECTRICAL CHARACTERISTICS (Inputtr=tf =3ns)
CAPACITIVE CHARACTERISTICSCPD isdefinedasthe valueoftheIC’s internal equivalent capacitance whichis calculatedfrom theoperating current consumption without
load. (RefertoTest Circuit). Average operating currentcanbe obtainedbythe following equation. ICC(opr) =CPD xVCCxfIN +ICC
74LX1G126
6/12
TEST CIRCUIT =ZOUTof pulse generator (typically50Ω)
TEST CIRCUIT AND WAVEFORM SYMBOL VALUE
WAVEFORM1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
